NDLI: Design verification by concurrent simulation and automatic comparison

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2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)

2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)

2013 IEEE 56th International Midwest Symposium on Circuits and Systems (MWSCAS)

2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS)

2011 IEEE 54th International Midwest Symposium on Circuits and Systems (MWSCAS)

2010 53rd IEEE International Midwest Symposium on Circuits and Systems

2009 52nd IEEE International Midwest Symposium on Circuits and Systems

2008 51st Midwest Symposium on Circuits and Systems

2007 50th Midwest Symposium on Circuits and Systems

2006 49th IEEE International Midwest Symposium on Circuits and Systems

48th Midwest Symposium on Circuits and Systems, 2005.

The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04.

2003 46th Midwest Symposium on Circuits and Systems

The 2002 45th Midwest Symposium on Circuits and Systems, 2002. MWSCAS-2002.

Proceedings of the 44th IEEE 2001 Midwest Symposium on Circuits and Systems. MWSCAS 2001 (Cat. No.01CH37257)

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Proceedings of 40th Midwest Symposium on Circuits and Systems. Dedicated to the Memory of Professor Mac Van Valkenburg

Volume 2 - 1997

Fast VLSI architecture for rank order based filtering using a bit-serial window partitioning technique

Eisenstein residue number system with applications to DSP

An iterative method for the design of FIR partial filter banks

Constrained min-max optimization of finite-precision multi-rate digital filters over the canonical signed-digit coefficient space

Design of two-dimensional digital filters using integer coefficient 2-D all-pass filters

Cascaded realization of complex adaptive IIR notch filters

Accommodating boundary conditions in the wave digital simulations of PDE systems

Exhaustive searching for limit cycles in recursive block floating point systems

Crossover and mutation in genetic algorithms employing canonical signed-digit number system

Discretization of the transmission line equations using orthogonal digital filters

Fixed point vocoder implementation

Implementation of raised cosine filters using orthonormal expansions

Adaptive wavelet based phoneme recognition

Channel decoding implementation in downlink of CDMA systems

Partitioned echo canceller utilizing decimation echo location

Echo cancellation with delay estimation

A frequency domain multi-band harmonic vocoder for speech data compression

Simultaneous code execution and data storage in a single flash memory chip for real time wireless communication systems

Projection methods for improved performance in FIR adaptive filters

Performance enhanced adaptive equalizers for multicarrier channels

A noise constrained LMS algorithm for fading channel communications

Finite time recovery in decision feedback equalization for time varying channels

Practical considerations in the use of a new OBE algorithm that blindly estimates error bounds

Adjacent errors for assessing estimation and modeling algorithm performance

Performance studies on a "quasi-OBE" algorithm for real-time signal processing

Estimating channel response from pilot subcarrier pairs for OFDM systems

Adjacent errors of stochastic gradient algorithms under general error criteria

VLSI design for an adaptive equalizer using a residue number system architecture for magnetic channels

Biased two's complement representation for low-power DSP systems

A pipelined strength-reduced adaptive filter: finite precision analysis and application to 155.52 Mb/s ATM-LAN

A compact carry-save multiplier architecture and its applications

Multiprocessor 3D sound system

Real-time processing of speech signals using networked computers

Real-time speech signal analysis-synthesis of the Hoyer-Narris model using networked computers

Modulator design and architecture for multiple wireless applications

Mismatch cancellation for complex bandpass sigma-delta modulators

A new low power building block cell for adders

A new robust frequency-domain adaptive filter with colored signal input

Implementation of an identification algorithm using a cross-correlation method in order to identify the induction motor rotor time constant

DSPs interconnection using optical fiber cables

A modular analog NLMS structure for system identification

Structured total least squares with fixed elements

MAT2DSP-a MATLAB tool for rapid feedback on the implementation requirements of signal processing algorithms

New techniques for detection of changes in the local mean of a signal

A generalized block constant modulus algorithm and its VLSI architecture

Audio signal enhancement performance of an RLS algorithm over long time intervals

Two polyphase filter architectures for MPEG audio

Block computation architectures for 2-D discrete wavelet transforms

A wavelet-based multicarrier modulation scheme

Voice analysis in adverse conditions: the Centennial Olympic Park Bombing 911 call

Subject dependent transfer functions in spatial hearing

Signal processing for cochlear prosthesis: a tutorial review

Synchronous correction of the pitch by using the TMS320C50

A method of wavelet selection in phoneme recognition

Adaptive discrete cosine transform for noise cancellation of vibrational signals

Recognition of plane projective symmetry

Temporal estimation of cardiac non-rigid motion in image sequences

Interactive viewpoint modification for multiple perspective views

A band-matching approach for motion estimation

An efficient lossless image compression scheme based on a 2-D predictive model and a new contextual source coder

Automatic real-time identification of fingerprint images using wavelets and gradient of Gaussian

Addition of robustness to standard video compression protocols

Efficient transmission of images using modified HINT

Wavelet-based denoising: comparisons between orthogonal and non-orthogonal decompositions

Three-dimensional deconvolution of optical microscope images using adaptive inverse modelling

Optical system modeling for digital image restoration

Low cost image processing system for line-scan images

(Blind) adaptive equalizers with soft decision feedback

Subband image representation employing wavelets and multi-transforms

Multi sensor data fusion using fuzzy-association techniques

A high-speed and high-performance video format conversion system

Automatic switching-network analysis using wavelet-based tools

A generalized two-dimensional frequency domain least square algorithm for ARMA system modeling

Linear programming design of two-channel perfect-reconstruction biorthogonal filter banks-linear-phase and low-delay

A computationally efficient IDCT algorithm

Impulse sampled intermittent polyphase SC FIR rational decimators with double-sampling

Blind separation of two signals by estimation of two fourth-order cumulants

State of the art iterated block matching fractals in image compression

Image enhancement and noise reduction using wavelet transform

Registration in a distributed multi-sensor environment

Low power VLSI architectures for variable-length encoding and decoding

Development of redesign process for digital VLSI system

Design error diagnosis and correction in VLSI digital circuits

Rapid system design framework for fuzzy applications

Hardware/software codesign for embedded signal processing

An algorithm for mapping non-complete binary trees to cellular architecture FPGAs

A self-timed cyclic redundancy check (CRC) in VLSI

Improving two-level logic minimization technique for low power driven multilevel logic re-synthesis

Hybrid time-stamped transition density for the estimation of delay-dependent switching activities

AND/EXOR-based regular function representation

Analog layout generation: from design assistant to automated layout

An efficient age-controlled evolution approach solving the assignment problem on analog transistor arrays

Exact analysis of periodically switched linear filters using state equations

Compact high gain CMOS op amp design using comparators

Design of a pulse stream neural network

A vector quantizer with fully pipelined data and control flow

VLSI circuit for programmable sorting

A BiCMOS VLSI implementation of an intelligent sensor

VLSI design of a new infrared communication controller for wireless communications

An efficient physically-based MOSFET model for RF circuit design

A CAD tool for identification, building and handling of fuzzy model in system behavioral modeling [of analogue ICs]

A non-statistical approach to tolerance analysis of microwave circuits

Design verification by concurrent simulation and automatic comparison

A complete layout system for the PC

A method for the generation of HDL code at the RTL level from a high-level formal specification language

Technology mapping for storage elements based on BDD matching

A dynamic four-bit carry lookahead adder circuit for complementary gallium arsenide (CGaAs) fabrication processes

Dynamic logic families for complementary gallium arsenide (CGaAs) fabrication processes

Gallium arsenide based micro-accelerometers

Soft error immune GaAs circuit technologies

A 'do-it-yourself' methodology for CMOS transistor mismatch characterization

Low-power design methodology: power estimation and optimization

Estimation of maximum switching activity in digital VLSI circuits

Design and exploration tools for deep submicron systems

User interface issues in a high level test synthesis environment

A novel architecture for real-time sprite decoding

A generalized HSPICE macro-model for spin-valve GMR memory bits

An SCMOS digital cell family for mixed-signal applications

Simulation of random jitter in ring oscillators with SPICE

A 1.0625 Gbps PECL line driver

A formulation method for including ideal operational amplifiers in modified nodal analysis

A 2.5 V 50 MHz /spl Delta//spl Sigma/-modulator for digital cellular telephones

New 900 MHz CMOS voltage-controlled oscillator for wireless communications

A 1.9 GHz CMOS RF down-conversion mixer

Low voltage low power CMOS current mode building blocks for hearing aid applications

A CMOS programmable silicon retina implementing vision algorithms

LV/LP CMOS square-law circuits

A CMOS robust fully-balanced-signal generator

LV CMOS high speed analog multiplier

A low-voltage low-power CMOS opamp with rail-to-rail input/output

High slew rate micro-power CMOS OTA with class AB input stage

A low-power VLSI architecture for the Viterbi decoder

An optimization model for k-way partitioning

INALSYS: a layout automation system based on analog layout constraints

An efficient hardware design approach from system-level specification

A low-cost VLSI architecture design for non-separable 2-D discrete wavelet transform

A high-performance VLSI architecture for MAPS criterion motion estimation

An image processing hardware design environment

Top-down design of a high speed DCT architecture and implementation [video compression]

Formulation and algorithms for blind signal recovery

Real time separation of audio signals using digital signal processors

Post processing of separated signals for feature extraction and identification

Blind separation of convolutive mixtures

A note on error bounds for function approximation using nonlinear networks

Blind joint multiuser detection using second-order statistics and structure information

Separation conditions and criteria for uniform approximation of input-output maps

Computational results on recurrent dynamic neural network for signal analysis

An embedded global addressing technique for scalable neural architectures

Reinforcement neural learning with application to gas sensors

Synthesis of neural networks for rotor flux identification in asynchronous motor control

Mapping the VLSI channel routing problem onto the Hopfield/tank network when cyclic vertical constraints are not excluded

Quantization noise improvement in a distributed-neuron architecture

An encoder for vector quantization neural networks

Identification of magnetic phases of weathered tuffite soil using artificial neural network

Diagnosis of analogue nonlinear circuits in dc domain by using a tearing procedure

Parallel waveform relaxation circuit simulator through UNIX socket connection

Power transmission line modeling-a comparison

A high-level approach to modeling nonlinear analog architectures

An analytical model for AlGaAs/GaAs HEMTs at large gate voltage

A behavioural nonlinear SiGe-HBT model based on Gummel-Poon topology

Simulating discrete system pole location data with 3D effects using circular functions and determinants

A novel graphical technique for analysis of runtime cache behavior

CMOS analog implementation of cellular neural network to solve partial differential equations with a microelectromechanical thermal interface

Linear bilateral CMOS resistor for neural-type circuits

Low power/minimum transistor building blocks for the implementation of back-propagation algorithms

Multifont character recognition by 9/spl times/9 DPCNN board

Neural hardware for image processing

A modified adaptive sign algorithm used on the hybrid norm error criterion

A robust stereophonic subband adaptive acoustic echo canceller

Switched-capacitor adaptive sampling rate notch filter for enhancement and elimination of bandpass signals

Adaptive filtering using heterodyne frequency translation

A current mode continuous-time adaptive filter

Convergence analyses of timing and carrier recovery loops for a digital communication channel with an adaptive equalizer

An active noise control algorithm with on-line system identification based on a delayless subband adaptive filter architecture

Design of a 3.0 V CMOS continuous time low-pass filter with on-chip tuning circuits for CDMA cellular phone application

A 3.3 V 0.8 /spl mu/m CMOS single chip IF IC for CDMA/FM cellular phone

Design of an efficient high-speed VLSI architecture for WLAN modem

Optimum filtering for maximum channel capacity in PSK and FSK modulation systems

Broadband networks to support multimedia services

A low-noise receiver channel for a pulsed laser rangefinder

Bit level VLSI design of high throughput DLMS adaptive IIR filters

An infrastructure for numeric precision control in the Ptolemy environment

Quantization error analysis of the radix-4 signed-digit arithmetic

A CMOS differential amplifier with well-controlled voltage gain

Parametric yield optimization of electronic circuits via improved centers of gravity algorithm

Integrated bipolar operational amplifier with rail-to-rail inputs and output

180/spl times/180 element ultra-high frame rate burst image sensor

The FPGA to MPGA ASIC conversion process

On a spectral scaling technique for pitch control in the high-quality text-to-speech type system

Development of automatic diagnostic test system for mixed-signal/analog integrated circuits

Power system preventive control using artificial neural network based generation rescheduling method

Application of nonlinear Kalman filter approach in dynamic GPS-based attitude determination

Design of sparse FIR filters based on branch-and-bound algorithm

Multiplierless FIR filters based on cyclotomic and interpolated second-order polynomials with powers-of-two coefficients

Arbitrarily-shaped wavelet transform for image compression

A VLSI implementation of image processor for facsimile and digital copier

A multi-function amperometric microsensor for medical applications

High temperature integrated voltage regulator system design

A single-chip digital phase meter for vibration analysis of rotating machinery

An analytical damaged submicron MOSFET model for CAD applications

Higher harmonics and verification of limit cycle stability in autonomous nonlinear systems

Volume 1 - 1997

Proceedings of the 39th Midwest Symposium on Circuits and Systems

38th Midwest Symposium on Circuits and Systems. Proceedings

Proceedings of 1994 37th Midwest Symposium on Circuits and Systems

Proceedings of 36th Midwest Symposium on Circuits and Systems

[1992] Proceedings of the 35th Midwest Symposium on Circuits and Systems

[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems

Proceedings of the 33rd Midwest Symposium on Circuits and Systems

Proceedings of the 32nd Midwest Symposium on Circuits and Systems,

Design verification by concurrent simulation and automatic comparison

Content Provider	IEEE Xplore Digital Library
Author	Taekyoon Ahn Kiyoung Choi
Copyright Year	1997
Description	Author affiliation: Sch. of Electr. Eng., Seoul Nat. Univ., South Korea (Taekyoon Ahn; Kiyoung Choi)
Abstract	Verifying a synthesized hardware design is a tedious and time consuming task because the existing methods need designer's efforts of checking the simulation results. We propose a new verification method which compares automatically the simulation results obtained for two designs: one before synthesis and one after synthesis. The two simulations, one for each design, run concurrently, comparing each pair of matching nets. The inconsistency is reported as soon as possible without necessarily completing the simulation run. Experimental results show that our method detects design errors earlier and easier than the existing methods.
Starting Page	1087
Ending Page	1090
File Size	458593
Page Count	4
File Format	PDF
ISBN	0780336941
DOI	10.1109/MWSCAS.1997.662266
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-08-06
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Discrete event simulation Hardware Clocks Design methodology Computational modeling Signal design Signal synthesis Computer errors Computer architecture Job design
Content Type	Text
Resource Type	Article

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