NDLI: A low-voltage single-Opamp 4th-order band-pass /spl Delta//spl Sigma/-modulator

Content Provider	IEEE Xplore Digital Library
Author	Salo, T. Lindfors, S. Halonen, K.
Copyright Year	2001
Description	Author affiliation: Electron. Circuit Design Lab., Helsinki Univ. of Technol., Finland (Salo, T.)
Abstract	A band-pass /spl Delta//spl Sigma/-modulator can be used to directly digitize the IF signal in a radio receiver. As the resolution and the channel bandwidth of a band-pass /spl Delta//spl Sigma/-modulator can easily be traded afterwards, it is the key circuit block in implementing receivers for future multi-mode mobile phones. However, the reported implementations have been based on resonator structures which are poorly suited to a low supply voltage which has led to high power consumptions. A switched-capacitor double-delay resonator structure which imposes no limitation on the Opamp output scaling is proposed. The structure allows the optimization of Opamp output swings with no power penalty and is thus ideally suited for low supply voltage. A single Opamp bandpass /spl Delta//spl Sigma/-modulator which shares the Opamp between two double-delay resonators is presented along with behavioral level simulation results. According to the simulations the presented BP /spl Delta//spl Sigma/-modulator achieves 14 b-resolution for the GSM-channel bandwidth (BW=270 kHz) and 6 b-resolution for the WCDMA-channel bandwidth (BW=3.84 MHz).
Sponsorship	IEEE Circuits & Syst. Soc
Starting Page	352
Ending Page	355
File Size	377678
Page Count	4
File Format	PDF
ISBN	0780366859
DOI	10.1109/ISCAS.2001.921865
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-05-06
Publisher Place	Australia
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Delta modulation Circuits Mobile handsets Receivers Bandwidth Frequency Delay GSM Q factor Laboratories
Content Type	Text
Resource Type	Article

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