NDLI: CBC8: A 0.25 µm SiGe-CBiCMOS technology platform on thick-film SOI for high-performance analog and RF IC design

Content Provider	IEEE Xplore Digital Library
Author	Babcock, J.A. Cestra, G. van Noort, W. Allard, P. Ruby, S. Tao, J. Malone, R. Buchholz, A. Lavrovskaya, N. Yindeepol, W. Printy, C. Ramdani, J. Labonte, A. McCulloh, H. Yaojian Leng McCarthy, P. Getchell, D. Sehgal, A. Krakowski, T. Desai, S. Joyce, C. Hojabri, P. Decoutere, S.
Copyright Year	2010
Description	Author affiliation: National Semiconductor, APTD, Portland, ME 04106 USA (van Noort, W.; Allard, P.; Ruby, S.; Printy, C.; Ramdani, J.; Labonte, A.; McCulloh, H.; Yaojian Leng; McCarthy, P.; Getchell, D.; Sehgal, A.; Joyce, C.) \|\| IMEC, Kapeldreef 75, B-3001 Leuven, Belgium (Decoutere, S.) \|\| National Semiconductor, 2900 Semiconductor Drive, Santa Clara, CA 95051 USA (Babcock, J.A.; Cestra, G.; Tao, J.; Lavrovskaya, N.; Yindeepol, W.; Krakowski, T.; Desai, S.; Hojabri, P.) \|\| HSPD SP Design National Semiconductor, Fort Collins, CO 80525 USA (Malone, R.; Buchholz, A.)
Abstract	A production released complementary-SiGe BiCMOS technology on SOI has been developed for high speed analog and RFIC applications. It features matched SiGe:C PNP and NPN transistors. The PNP shows cutting edge performance metrics with β·VA =17,000 and near record fT·BVCEO ≥ 195GHz·V for a 5V process while demonstrating best in class linearity on a fully differential amplifier design. A modular process flow was leveraged to enhance the Analog design needs for the platform. For higher-speed lower power, we also demonstrate a low voltage SiGe NPN with peak fT of 50 GHz at low-bias (VCE = 0.5V), ideal for load line drive. Finally, we discuss core CMOS devices which utilize a dual-gate oxide process for improved mixed-signal mixed-voltage design and better optimization of digital blocks.
Starting Page	41
Ending Page	44
File Size	806915
Page Count	4
File Format	PDF
ISBN	9781424485789
ISSN	10889299
e-ISBN	9781424485796
DOI	10.1109/BIPOL.2010.5667971
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-10-04
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Silicon germanium CMOS integrated circuits Frequency measurement Voltage measurement Current measurement Heterojunction bipolar transistors Radio frequency
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

PNP SiGe: C HBT Optimization in a Low-Cost CBiCMOS Process

Integration of a 50 V BVCEO SiGe:C HBT into a 0.25 μm SiGe:C BiCMOS platform

Emerging application opportunities for SiGe technology

Concept of vertical bipolar transistor with lateral drift region, applied to high voltage SiGe HBT

Systematic analysis of RF distortion in SiGe HBT's

A SiGe HBT BiCMOS technology for mixed signal RF applications

Optimization of high-voltage RF power SiGe transistors for cellular applications [HBTs]

Investigation of Geometry Scaling Effect on Si BJT and SiGe HBT fabricated on SOI Substrates

On the Potential of SiGe HBTs for Extreme Environment Electronics

CBC8: A 0.25 µm SiGe-CBiCMOS technology platform on thick-film SOI for high-performance analog and RF IC design

Similar Documents

PNP SiGe: C HBT Optimization in a Low-Cost CBiCMOS Process

Integration of a 50 V BVCEO SiGe:C HBT into a 0.25 μm SiGe:C BiCMOS platform

Emerging application opportunities for SiGe technology

Concept of vertical bipolar transistor with lateral drift region, applied to high voltage SiGe HBT

Systematic analysis of RF distortion in SiGe HBT's

A SiGe HBT BiCMOS technology for mixed signal RF applications

Optimization of high-voltage RF power SiGe transistors for cellular applications [HBTs]

Investigation of Geometry Scaling Effect on Si BJT and SiGe HBT fabricated on SOI Substrates

On the Potential of SiGe HBTs for Extreme Environment Electronics

CBC8: A 0.25 µm SiGe-CBiCMOS technology platform on thick-film SOI for high-performance analog and RF IC design