NDLI: 60 GHz HR SOI CMOS antenna for a System-on-Chip integration scheme targeting high data-rate kiosk applications

Content Provider	IEEE Xplore Digital Library
Author	Pilard, R. Gianesello, F. Gloria, D. Titz, D. Ferrero, F. Luxey, C.
Copyright Year	2011
Description	Author affiliation: STMicroelectronics, Technology R&D, STD, TPS Lab, 850, rue Jean Monnet, 38926 Crolles, France (Pilard, R.; Gianesello, F.; Gloria, D.) \|\| LEAT, Université de Nice-Sophia-Antipolis, 250, rue A. Einstein, 06560 Valbonne, France (Titz, D.; Ferrero, F.; Luxey, C.)
Abstract	During past years, various research teams have been implied in the development of 60 GHz chipset solutions, using both BiCMOS or advanced CMOS technologies. But for the 60 GHz market to flourish, not only are low cost RFICs required, but also complete solution including the antenna. In order to address these issues, we review in this paper achievable antenna performance using High Resistivity (HR) Silicon on Insulator (SOI) CMOS technology, antenna design for a System-on-Chip (SoC) integration and 3D on wafer characterization. Antenna gain of 3.9 dBi @ 60 GHz has been measured making HR SOI CMOS technology a promising one targeting low cost short range high data-rate kiosk file-downloading at 60 GHz.
Starting Page	895
Ending Page	898
File Size	1289188
Page Count	4
File Format	PDF
ISBN	9781424495627
ISSN	19471491
e-ISBN	9781424495634
DOI	10.1109/APS.2011.5996420
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-07-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Antenna measurements Antenna radiation patterns Silicon CMOS integrated circuits CMOS technology Silicon on insulator technology gain Integrated antennas high resistivity silicon SOI radiation pattern
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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