NDLI: Synchronized Clock for DMS-100 Family

Content Provider	IEEE Xplore Digital Library
Author	Munter, E.
Copyright Year	1972
Abstract	The advent of digital telephone switches, interconnected by digital carrier systems, makes it possible to route and transmit telephone and data signals virtually without deterioration over many links and through many switching nodes. No bits of the digitized speech or data, however, should be lost en route; an economical method to ensure this is to operate the entire digital telephone system (of a country) synchronously. A highly stable master frequency reference is established from which all digital switching centers derive their clocking, either directly by national distribution of the reference frequency, or through the means of the (pulse-code modulation) PCM transmission systems which interconnect the switches. Operating considerations require that the synchronized clock systems of every switch can survive outages of equipment or synchronizing links without major impact on telephone service. The present paper is concerned with the design and performance of the synchronized clock system as an integral part of a large digital telephone switching office. Clocking and synchronization hardware and software algorithms have been developed to allow a switching office to be synchronized by external reference standards or over digital carrier links. The components of the synchronization system of an office are distributed in peripheral interface hardware, digitally controlled clock hardware, and a feedback algorithm implemented in the software of the switching computer. Steady-state and dynamic behavior are analyzed for a single switch and a timing network. Mathematical analysis is supported by simulation results. Special attention is given to quantization effects and maintenance considerations.
Starting Page	1276
Ending Page	1284
Page Count	9
File Size	678763
File Format	PDF
ISSN	00906778
Volume Number	28
Issue Number	8
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1980-08-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Clocks Frequency synchronization Switches Telephony Hardware Pulse modulation Software algorithms Speech Digital modulation Phase change materials
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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