NDLI: Analysis of GeOI FinFET 6T SRAM Cells With Variation-Tolerant WLUD Read-Assist and TVC Write-Assist

Content Provider	IEEE Xplore Digital Library
Author	Hu, V.P.-H. Ming-Long Fan Pin Su Ching-Te Chuang
Copyright Year	1963
Abstract	This paper analyzes the impacts of read-assist and write-assist circuits on GeOI FinFET 6T SRAM cells considering intrinsic random variations, process corner, and temperature variation. The word-line under-drive (WLUD) read-assist is more efficient to improve the read static noise margin and read V_MIN of fast-N slow-P corner GeOI FinFET SRAM cells compared with the Silicon-On-Insulator (SOI) counterparts. GeOI FinFET SRAM cells with WLUD show less cell read access-time degradation compared with the SOI counterparts at both 25 °C and 125 °C. With transient voltage collapse (TVC) write-assist, the write-ability and variation tolerance of GeOI and SOI FinFET SRAM cells are improved. The temperature dependence of data retention time is different between the GeOI and SOI FinFET SRAM cells. The maximum TVC write-assist pulsewidth constrained by the data retention failure is smaller in GeOI FinFET SRAMs at 25 °C and becomes comparable at 125 °C compared with the SOI FinFET SRAMs.
Sponsorship	IEEE Electron Devices Society
Starting Page	1710
Ending Page	1715
Page Count	6
File Size	2982929
File Format	PDF
ISSN	00189383
Volume Number	62
Issue Number	6
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	FinFETs SRAM cells Threshold voltage Degradation Thermal stability Transient analysis write-assist. GeOI FinFET read-assist SRAM static noise margin write-assist
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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