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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Asenov, A. Cheng, B. Xingsheng Wang Brown, A.R. Millar, C. Alexander, C. Amoroso, S.M. Kuang, J.B. Nassif, S.R. |
| Copyright Year | 1963 |
| Abstract | In this paper, we use an automated tool flow in a 14 nm CMOS fin-shaped field-effect transistor (FinFET)/ static random access memory (SRAM) simulation-based design-technology cooptimization (DTCO) including both process-induced and intrinsic statistical variabilities. A 22 nm FinFET CMOS technology is used to illustrate the sensitivity to process-induced fin shape variation and to motivate this paper. Predictive Technology Computer Aided Design (TCAD) simulations have been carried out to evaluate the transistor performance ahead of silicon. Draft-diffusion simulations calibrated to the ensemble Monte Carlo simulation results are used to explore the process and the statistical variability space. This has been enabled by the automation of the tool flow and the dataset handling. The interplay between the process and the statistical variability has been examined in details. A two-stage compact model strategy is used to capture the interplay between process and statistical variability. To close the DTCO loop, the static noise margin and write noise margin sensitivity to cell design parameters and variability in FinFET-based SRAM designs are studied in details. |
| Sponsorship | IEEE Electron Devices Society |
| Starting Page | 1682 |
| Ending Page | 1690 |
| Page Count | 9 |
| File Size | 8503624 |
| File Format | |
| ISSN | 00189383 |
| Volume Number | 62 |
| Issue Number | 6 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2015-01-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | FinFETs Integrated circuit modeling Logic gates Random access memory Shape Semiconductor device modeling variability. Circuit simulation compact model design-technology cooptimization (DTCO) fin-shaped field-effect transistor (FinFET) Monte Carlo static random access memory (SRAM) TCAD variability |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering |
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