NDLI: Mitigating Memory-Induced Dark Silicon in Many-Accelerator Architectures

Content Provider	IEEE Xplore Digital Library
Author	Diamantopoulos, D. Xydis, S. Siozios, K. Soudris, D.
Copyright Year	2002
Abstract	Many-Accelerator (MA) systems have been introduced as a promising architectural paradigm that can boost performance and improve power of general-purpose computing platforms. In this paper, we focus on the problem of resource under-utilization, i.e. Dark Silicon, in FPGA-based MA platforms. We show that except the typically expected peak power budget, on-chip memory resources form a severe under-utilization factor in MA platforms, leading up to 75 percent of dark silicon. Recognizing that static memory allocation-the de-facto mechanism supported by modern design techniques and synthesis tools-forms the main source of memory-induced Dark Silicon, we introduce a novel framework that extends conventional high level synthesis (HLS) with dynamic memory management (DMM) features, enabling accelerators to dynamically adapt their allocated memory to the runtime memory requirements, thus maximizing the overall accelerator count through effective sharing of FPGA's memories resources. We show that our technique delivers significant gains in FPGA's accelerators density, i.e. 3.8×, and application throughput up to 3.1× and 21.4× for shared and private memory accelerators.
Sponsorship	IEEE Computer Society
Starting Page	136
Ending Page	139
Page Count	4
File Size	858613
File Format	PDF
ISSN	15566056
Volume Number	14
Issue Number	2
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-07-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Resource management Throughput Field programmable gate arrays Memory management Network architecture System-on-chip Dynamic scheduling high-level synthesis many-accelerator architectures dynamic memory management Many-accelerator architectures
Content Type	Text
Resource Type	Article
Subject	Hardware and Architecture

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