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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Ji-Yong Um Yoon-Jee Kim Eun-Woo Song Jae-Yoon Sim Hong-June Park |
| Copyright Year | 2004 |
| Abstract | A digital-domain calibration method is proposed for a split-capacitor DAC (split-CDAC) used in a differential-type 11-bit SAR ADC. It calibrates the nonlinearities of SAR ADC due to the DAC capacitance mismatch as well as the two parasitic capacitances connected in parallel with each of the bridge capacitor and the LSB bank of split-CDAC. The proposed ADC does not require any additional analog circuits for calibration, because it utilizes one of the two split-CDACs to measure the error codes of the other split-CDAC. During the normal A/D conversion step, the 11.5-bit raw SAR code output of ADC is added to the pre-measured error codes to generate the 11-bit calibrated output code. The analog block of the ADC was fabricated in a 0.13- μm CMOS process, and the digital block was implemented in a FPGA. The measured SNDR and SFDR are 61.6 dB (ENOB 9.93 bits) and 78 dB at the Nyquist rate with a 5 kHz sine wave input. INL and DNL are measured to be +0.96/-0.98 LSB, and +0.96/-0.97 LSB, respectively. This work extends the prior work by utilizing an additional 0.5-bit raw SAR code to eliminate the missing code, and by employing a temporal averaging with a FIR LPF to measure the error code reliably in spite of the supply noise. |
| Sponsorship | IEEE Circuits and Systems Society |
| Starting Page | 2845 |
| Ending Page | 2856 |
| Page Count | 12 |
| File Size | 3681276 |
| File Format | |
| ISSN | 15498328 |
| Volume Number | 60 |
| Issue Number | 11 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2013-01-01 |
| Publisher Place | U.S.A. |
| Access Restriction | One Nation One Subscription (ONOS) |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | successive approximation register (SAR) Analog-to-digital converter (ADC) digital-domain calibration split-capacitor digital-to-analog converter (DAC) |
| Content Type | Text |
| Resource Type | Article |
| Subject | Electrical and Electronic Engineering Hardware and Architecture |
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