NDLI: Defect Behaviors During High Electric Field Stress of p-Channel Power MOSFETs

Content Provider	IEEE Xplore Digital Library
Author	Ristic, G.S.
Copyright Year	2001
Abstract	The behaviors of the defects in the oxide, near and at the interface during various electric field stress experiments of commercial p-channel power VDMOSFETs, have been investigated. High electric field stress (HEFS), switching HEFS, and switching electric field annealing have been performed. The results have shown that the creations of both the positively charged fixed traps (FTs) (PCFTs) and negatively charged FTs (NCFTs) are more intensive in the case of positive HEFS than negative HEFS. The intermediate steps with low electric field stress do not significantly influence the defect creations in positive HEFS but do influence those in negative HEFS. The slow switching (border) traps have the same nature as FTs, and the same defect types are responsible for PCFT creation during positive and negative HEFSs.
Sponsorship	IEEE Electron Devices Society IEEE Reliability Society
Starting Page	94
Ending Page	100
Page Count	7
File Size	438582
File Format	PDF
ISSN	15304388
Volume Number	12
Issue Number	1
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-03-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Logic gates Stress Switches Substrates Charge carrier processes Transistors Silicon switching traps (STs) Fixed oxide traps high electric field stress (HEFS) interface traps MOS transistor
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Safety, Risk, Reliability and Quality Electrical and Electronic Engineering

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