NDLI: The Superjunction Insulated Gate Bipolar Transistor Optimization and Modeling

Content Provider	IEEE Xplore Digital Library
Author	Antoniou, M. Udrea, F. Bauer, F.
Copyright Year	1963
Abstract	In this paper, we present a detailed analysis and optimization of the superjunction (SJ) insulated gate bipolar transistor (IGBT). The SJ IGBT is a new device that breaks the IGBT limits, i.e., it delivers performance that is dramatically better. More specifically, we demonstrate here that the optimized SJ IGBT can deliver turn-off losses that are at least 50% lower than those of the state-of-art IGBT while maintaining a similarly low on-state performance, both at room temperature and at higher temperatures. The presence of alternating p- and n-pillars in the drift region gives rise to unique characteristics that when optimized can deliver superior performance. This paper also presents a SPICE model of the SJ IGBT under optimized conditions. Its results are in good agreement with the DESSIS simulation results under direct current conditions. This model consists of an intrinsic MOSFET and a parallel combination of wide- and narrow-base p-n-p bipolar junction transistors.
Sponsorship	IEEE Electron Devices Society
Starting Page	594
Ending Page	600
Page Count	7
File Size	1217233
File Format	PDF
ISSN	00189383
Volume Number	57
Issue Number	3
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-03-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Insulated gate bipolar transistors Doping Semiconductor process modeling Anodes MOSFET circuits Transistors Junctions superjunction (SJ) Field stop (FS) insulated gate bipolar transistor (IGBT) SPICE modeling
Content Type	Text
Resource Type	Article
Subject	Electronic, Optical and Magnetic Materials Electrical and Electronic Engineering

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