NDLI: Energy-Efficient Subthreshold Processor Design

Content Provider	IEEE Xplore Digital Library
Author	Bo Zhai Pant, S. Nazhandali, L. Hanson, S. Olson, J. Reeves, A. Minuth, M. Helfand, R. Austin, T. Sylvester, D. Blaauw, D.
Copyright Year	1993
Abstract	Subthreshold circuits have drawn a strong interest in recent ultralow power research. In this paper, we present a highly efficient subthreshold microprocessor targeting sensor application. It is optimized across different design stages including ISA definition, microarchitecture evaluation and circuit and implementation optimization. Our investigation concludes that microarchitectural decisions in the subthreshold regime differ significantly from that in conventional superthreshold mode. We propose a new general-purpose sensor processor architecture, which we call the Subliminal Processor. On the circuit side, subthreshold operation is known to exhibit an optimal energy point (Knin)- However, propagation delay also becomes more sensitive to process variation and can reduce the energy scaling gain. We conduct thorough analysis on how supply voltage and operating frequency impact energy efficiency in a statistical context. With careful library cell selection and robust static RAM design, the Subliminal Processor operates correctly down to 200 mV in a 0.13-mum technology, which is sufficiently low to operate at V_min . Silicon measurements of the Subliminal Processor show a maximum energy efficiency of 2.6 pJ/instruction at 360 mV supply voltage and 833 kHz operating frequency. Finally, we examine the variation in frequency and V_min across die to verify our analysis of adaptive tuning of the clock frequency and V_min for optimal energy efficiency.
Sponsorship	IEEE Computer Society Association for Computing Machinery (ACM)/SIGDA IEEE Computer Society Technical Committee on Design Automation
Starting Page	1127
Ending Page	1137
Page Count	11
File Size	1961599
File Format	PDF
ISSN	10638210
Volume Number	17
Issue Number	8
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-08-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy efficiency Process design Frequency Circuits Design optimization Microarchitecture Voltage Microprocessors Instruction sets Propagation delay ultra low power design Sensor networks subthreshold design $V_{\rm min}$
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Software Hardware and Architecture

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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