NDLI: An Integrated System for Simultaneous, Multichannel Neuronal Stimulation and Recording

Content Provider	IEEE Xplore Digital Library
Author	Blum, R.A. Ross, J.D. Brown, E.A. DeWeerth, S.P.
Copyright Year	2004
Abstract	Precision electronics that provide multi-electrode stimulation and recording capabilities are an important tool for the experimental study of neuronal development and plasticity. Towards this end, we present a custom analog integrated circuit (IC), fabricated in a 0.35-mum process, incorporating stimulation buffers and recording preamplifiers for multiple electrodes onto a single die. The architecture of the IC allows for arbitrary, independent configuration of electrodes for stimulation or recording, and the IC includes artifact-elimination circuitry that returns the stimulation electrode to its previous voltage following stimulation, minimizing the interference with recording. We analyze the thermal noise levels in the recording preamplifiers and experimentally measure input-referred noise as low as 4.77 muV_rms in the frequency range of 30 Hz-3 kHz at a power consumption of 100 muW from a total power supply of 3.8 V. We also consider the temporal response and stability of the artifact elimination circuitry. We demonstrate that the use of the artifact-elimination circuitry with a 30-mum diameter stimulation electrode permits a return to recording mode in les 2 ms after stimulation, facilitating near-simultaneous stimulation and recording of neuronal signals. (Patent applied for, U.S. No. 2007/0178579.)
Sponsorship	IEEE Circuits and Systems Society
Starting Page	2608
Ending Page	2618
Page Count	11
File Size	1164914
File Format	PDF
ISSN	15498328
Volume Number	54
Issue Number	12
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2007-12-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Electrodes Analog integrated circuits Preamplifiers Noise level Voltage Interference Power measurement Frequency measurement Noise measurement Integrated circuit noise stimulation artifact Analog VLSI multi-electrode array (MEA) neural stimulation and recording analog VLSI Neural stimulation and recording
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Hardware and Architecture

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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