NDLI: A unified approach for fault tolerance and dynamic power management in fixed-priority real-time embedded systems

Content Provider	IEEE Xplore Digital Library
Author	Ying Zhang Chakrabarty, K.
Copyright Year	1982
Abstract	This paper investigates an integrated approach for achieving fault tolerance and energy savings in real-time embedded systems. Fault tolerance is achieved via checkpointing, and energy is saved using dynamic voltage scaling (DVS). The authors present a feasibility analysis for checkpointing schemes for a constant processor speed as well as for variable processor speeds. DVS is then carried out on the basis of the feasibility analysis. The authors incorporate important practical issues such as faults during checkpointing, rollback recovery time, memory access time, and energy needed for checkpointing, as well as DVS and context switching overhead. Numerical results based on real-life checkpointing data and processor data sheets show that compared to fault-oblivious methods, the proposed approach significantly reduces power consumption and guarantees timely task completion in the presence of faults.
Sponsorship	IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society
Starting Page	111
Ending Page	125
Page Count	15
File Size	425546
File Format	PDF
ISSN	02780070
Volume Number	25
Issue Number	1
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-01-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fault tolerant systems Energy management Power system management Real time systems Embedded system Checkpointing Voltage control Fault tolerance Dynamic voltage scaling Energy consumption real-time scheduling dynamic voltage scaling (DVS) fault tolerance
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software

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