NDLI: 10- and 40-Gb/s forward error correction devices for optical communications

Content Provider	IEEE Xplore Digital Library
Author	Leilei Song Meng-Lin Yu Shaffer, M.S.
Copyright Year	1966
Abstract	Two standard forward error correction (FEC) devices for 10- and 40-Gb/s optical systems are presented. The first FEC device includes RS(255, 239) FEC, BCH(4359, 4320) FEC, and standard compliant framing and performance monitoring functions. It can support a single 10-Gb/s channel or four asynchronous 2.5-Gb/s channels. The second FEC device implements RS(255, 239) FEC at a data rate of 40 Gb/s. This paper presents the key ideas applied to the design of Reed-Solomon (RS) decoder blocks in these devices, especially those for achieving high throughput and reducing complexity and power. Implemented in a 1.5-V, 0.16-/spl mu/m CMOS technology, the RS decoder in the 10-Gb/s, quad 2.5-Gb/s device has a core gate count of 424 K and consumes 343 mW; the 40-Gb/s RS decoder has a core gate count of 364 K and an estimated power consumption of 360 mW. The 40-Gb/s RS FEC is the highest throughput implementation reported to date.
Sponsorship	IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE
Starting Page	1565
Ending Page	1573
Page Count	9
File Size	718717
File Format	PDF
ISSN	00189200
Volume Number	37
Issue Number	11
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-11-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Optical devices Forward error correction Optical signal processing Decoding High speed optical techniques SONET Throughput Optical fiber communication Reed-Solomon codes Error correction codes
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A high-speed low-complexity Reed-Solomon decoder for optical communications

Area-efficient reed-solomon decoder design for optical communications

Low-density parity-check codes for 40-gb/s optical transmission systems

Area-Efficient VLSI Design of Reed–Solomon Decoder for 10GBase-LX4 Optical Communication Systems

Architecture for decoding adaptive Reed-Solomon codes with variable block length

PPM Performance for Reed-Solomon Decoding Over an Optical-RF Relay Link

A hybrid ARQ scheme with adaptive forward error correction for satellite communications

Study on the optimum Reed-Solomon-based FEC codes for 40-Gb/s-based ultralong-distance WDM transmission

High-sensitivity 40-gb/s RZ-DPSK with forward error correction

10- and 40-Gb/s forward error correction devices for optical communications

Similar Documents

A high-speed low-complexity Reed-Solomon decoder for optical communications

Area-efficient reed-solomon decoder design for optical communications

Low-density parity-check codes for 40-gb/s optical transmission systems

Area-Efficient VLSI Design of Reed–Solomon Decoder for 10GBase-LX4 Optical Communication Systems

Architecture for decoding adaptive Reed-Solomon codes with variable block length

PPM Performance for Reed-Solomon Decoding Over an Optical-RF Relay Link

A hybrid ARQ scheme with adaptive forward error correction for satellite communications

Study on the optimum Reed-Solomon-based FEC codes for 40-Gb/s-based ultralong-distance WDM transmission

High-sensitivity 40-gb/s RZ-DPSK with forward error correction

10- and 40-Gb/s forward error correction devices for optical communications