NDLI: An SOS MOSFET model based on calculation of the surface potential

Content Provider	IEEE Xplore Digital Library
Author	Howes, R. Redman-White, W. Nichols, K.G. Mole, P.J. Robinson, M.J. Bird, S.
Copyright Year	1982
Abstract	A circuit simulation model is presented suitable for the design of analogue and digital SOS MOSFET integrated circuits. Both the drift and diffusion components of channel current are modeled, which are computed from the surface potentials at the drain and source ends of the channel. The surface potential function varies continuously from subthreshold to strong inversion allowing a smooth transition of device conductances and capacitances at the threshold voltage. Charge is conserved in the model formulation yielding reliable simulation results in transient analysis. The model has been implemented in the SPICE program, together with important extrinsic elements such as impact ionization current, pn-junction current and capacitances, and substrate resistance. The pn-junction current expression includes a physical formulation for the drain leakage current. The influence of temperature on device characteristics is included, making the model valid from /spl minus/55 to 125/spl deg/C. Simulation results are compared with measured dc device characteristics showing considerable improvement over bulk MOS models in predicting the drain conductance. In subthreshold, the model predicts the observed increase in inverse subthreshold slope with drain bias for n-channel devices. Transient simulations show that capacitive coupling from drain, gate and source nodes can strongly influence the floating substrate potential. The model has been successfully applied to the design of analogue SOS circuits.<>
Sponsorship	IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society
Starting Page	494
Ending Page	506
Page Count	13
File Size	1387186
File Format	PDF
ISSN	02780070
Volume Number	13
Issue Number	4
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1994-04-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	MOSFET circuits Predictive models Circuit simulation Integrated circuit modeling Capacitance Analog integrated circuits Digital integrated circuits Threshold voltage Computational modeling Analytical models
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Problems in Precision Modeling of the MOS Transistor for Analog Applications

A CAD-Oriented Analytical MOSFET Model for High-Accuracy Applications

MISNAN-a physically based continuous MOSFET model for CAD applications

Unified complete MOSFET model for analysis of digital and analog circuits

Table Lookup MOSFET Capacitance Model for Short-Channel Devices

Analytical MOSFET model for quarter micron technologies

MOSFET thermal noise modeling for analog integrated circuits

An improved analytical short-channel MOSFET model valid in all regions of operating for analog/digital circuit simulation

A physical parametric transistor model for CMOS circuit simulation

An SOS MOSFET model based on calculation of the surface potential

Similar Documents

Problems in Precision Modeling of the MOS Transistor for Analog Applications

A CAD-Oriented Analytical MOSFET Model for High-Accuracy Applications

MISNAN-a physically based continuous MOSFET model for CAD applications

Unified complete MOSFET model for analysis of digital and analog circuits

Table Lookup MOSFET Capacitance Model for Short-Channel Devices

Analytical MOSFET model for quarter micron technologies

MOSFET thermal noise modeling for analog integrated circuits

An improved analytical short-channel MOSFET model valid in all regions of operating for analog/digital circuit simulation

A physical parametric transistor model for CMOS circuit simulation

An SOS MOSFET model based on calculation of the surface potential