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A physical parametric transistor model for CMOS circuit simulation

Content Provider	IEEE Xplore Digital Library
Author	Yu, S. Franz, A.F. Mihran, T.G.
Copyright Year	1982
Abstract	A transistor model for use in simulation of analog and digital CMOS circuits is described. This model treats inversion devices and normally off accumulation devices individually. The analysis, based on surface potential, is carried out in voltage space. Single expressions for drain current and terminal charges are obtained that conserve charge and give accurate DC, AC, and transient solutions. Derivatives of current and charges are continuous, thus removing a major source of nonconvergence in circuit simulation. The model precalculates and stores charge densities, requiring significantly less computer memory than table look up methods while still describing devices with arbitrary channel width-to-length ratios. The need for measuring device capacitance is eliminated because terminal charge and capacitance are computed from the same parameters that are used to compute drain current. Because the parameters are physical, the model can be used to monitor and predict the effect of process changes. The model has been implemented in the SPICE circuit simulation program and a variety of typical devices and circuits have been simulated successfully. CPU time requirements are comparable to the existing SPICE model.<>
Sponsorship	IEEE Council on Electronic Design Automation IEEE Circuits and Systems Society
Starting Page	1038
Ending Page	1052
Page Count	15
File Size	1374449
File Format	PDF
ISSN	02780070
Volume Number	7
Issue Number	10
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1988-10-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Semiconductor device modeling Circuit simulation SPICE CMOS digital integrated circuits CMOS analog integrated circuits Surface treatment Voltage Capacitance measurement Current measurement Charge measurement
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Electrical and Electronic Engineering Software

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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