NDLI: Digital characteristics of CMOS devices at cryogenic temperatures

Content Provider	IEEE Xplore Digital Library
Author	Deen, M.J.
Copyright Year	1966
Abstract	The results of measurements of the digital characteristics of CMOS devices as a function of temperature between 77 and 300 K and of supply voltage between 3 and 20 V are presented. Using a fixed supply of 5 V, the low noise margin decreased from 2.54 to 2.11 V, but the high noise margin increased from 2.18 to 2.40 V as the temperature was increased from 77 to 300 K. On lowering the temperature from 300 to 77 K, both V/sub II/ and V/sub IH/ increased and the transition between these input logic voltages became more abrupt. These and other digital characteristics including noise immunity. V/sub H/-V/sub I/, and V/sub IH/-V/sub II/ all showed a smooth monotonic improvement as the temperature decreased. These results can be qualitatively explained due to the increase in the absolute threshold voltages of the NMOS and PMOS transistors and to the decrease in the beta /sub N// beta /sub P/ ratio as the temperature is lowered.<>
Sponsorship	IEEE Solid-State Circuits Society IEEE Electron Devices Society IEEE Circuits and Systems Society Japan Society of Applied Physics (JSAP) IEEE Microwave Theory and Techniques Society IEEE San Francisco Section Bay Area Council Univ. PA IEEE
Starting Page	158
Ending Page	164
Page Count	7
File Size	637190
File Format	PDF
ISSN	00189200
Volume Number	24
Issue Number	1
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1989-02-01
Publisher Place	U.S.A.
Access Restriction	One Nation One Subscription (ONOS)
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Cryogenics Temperature Voltage CMOS technology Cooling Noise measurement Power generation Thermal degradation Time of arrival estimation Supercomputers
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Electrical characterization of SOS n-MOSFETs at cryogenic temperatures

Comments on Cryogenic noise parameter measurements of microwave devices

CMOS readout electronics for operation at cryogenic temperatures

Ultra-Wideband Chip Attenuator for Precise Noise Measurements at Cryogenic Temperatures

Electrical insulation at cryogenic temperatures

Quality factor enhancement in micromechanical resonators at cryogenic temperatures

Low-temperature electronics

AC-DC transfer at cryogenic temperatures using a superconducting resistive transition-edge temperature sensor

Cryogenic noise parameter measurements of microwave devices

Digital characteristics of CMOS devices at cryogenic temperatures

Similar Documents

Electrical characterization of SOS n-MOSFETs at cryogenic temperatures

Comments on Cryogenic noise parameter measurements of microwave devices

CMOS readout electronics for operation at cryogenic temperatures

Ultra-Wideband Chip Attenuator for Precise Noise Measurements at Cryogenic Temperatures

Electrical insulation at cryogenic temperatures

Quality factor enhancement in micromechanical resonators at cryogenic temperatures

Low-temperature electronics

AC-DC transfer at cryogenic temperatures using a superconducting resistive transition-edge temperature sensor

Cryogenic noise parameter measurements of microwave devices

Digital characteristics of CMOS devices at cryogenic temperatures