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  1. Proceedings of the 2012 ACM SIGPLAN Workshop on Memory Systems Performance and Correctness (MSPC '12)
  2. Trace-driven simulation of memory system scheduling in multithread application
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Identifying optimal multicore cache hierarchies for loop-based parallel programs via reuse distance analysis
Rank idle time prediction driven last-level cache writeback
Parallel memory defragmentation on a GPU
A higher order theory of locality
Can parallel data structures rely on automatic memory managers?
Can seqlocks get along with programming language memory models?
Trace-driven simulation of memory system scheduling in multithread application
Analysis of pure methods using garbage collection
Supporting virtual memory in GPGPU without supporting precise exceptions
Towards region-based memory management for Go
A study towards optimal data layout for GPU computing
Design space exploration of memory model for heterogeneous computing
Defensive loop tiling for multi-core processor

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Trace-driven simulation of memory system scheduling in multithread application

Content Provider ACM Digital Library
Author Chen, Mingyu Zhu, Pengfei Bao, Yungang Chen, Licheng Huang, Yongbing
Abstract Along with commercial chip-multiprocessors (CMPs) integrating more and more cores, memory systems are playing an increasingly important role in multithread applications. Currently, trace-driven simulation is widely adopted in memory system scheduling research, since it is faster than execution-driven simulation and does not require data computation. On the contrary, due to the same reason, its trace replay for concurrent thread execution lacks data information and contains only addresses, so misplacement occurs in simulations when the trace of one thread runs ahead or behind others. This kind of distortion can cause remarkable errors during research. As shown in our experiment, trace misplacement causes an error rate of up to 10.22% in the metrics, including weighted IPC speedup, harmonic mean of IPC, and CPI throughput. This paper presents a methodology to avoid trace misplacement in trace-driven simulation and to ensure the accuracy of memory scheduling simulation in multithread applications, thus revealing a reliable means to study inter-thread actions in memory systems.
Starting Page 30
Ending Page 37
Page Count 8
File Format PDF
ISBN 9781450312196
DOI 10.1145/2247684.2247691
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2012-06-16
Publisher Place New York
Access Restriction Subscribed
Subject Keyword Memory scheduling algorithm Multithread application Trace misplacement Trace-driven simulation
Content Type Text
Resource Type Article
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