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  1. Proceedings of the 2005 workshop on MEmory performance (MEDEA '05)
  2. NPCryptBench: a cryptographic benchmark suite for network processors
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Memory performance: dealing with applications, systems and architecture
Dusty caches for reference counting garbage collection
Data trace cache: an application specific cache architecture
Making a case for split data caches for embedded applications
Exploiting the replication cache to improve cache read bandwidth cost effectively
An efficient synchronization technique for multiprocessor systems on-chip
Hiding message delivery and reducing memory access latency by providing direct-to-cache transfer during receive operations in a message passing environment
NPCryptBench: a cryptographic benchmark suite for network processors
Memory bandwidth optimization through stream descriptors
Energy-efficient instruction scheduling utilizing cache miss information
Analysis of embedded video coder systems: a system-level approach

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NPCryptBench: a cryptographic benchmark suite for network processors

Content Provider ACM Digital Library
Author Lin, Chuang Yue, Yao Tan, Zhangxi
Abstract Network processors (NPs), a type of multicore, multithread system that exploits system-on-chip techniques, usually adopt a distributed, shared memory hierarchy to scale up network processing. Network applications running on NP often display distinct characteristics on memory subsystem compared with traditional processors with multilevel cache. As security, especially cryptography, has become indispensable in today's networks, we present a benchmark suite called NPCryptBench. It is the first benchmark specially designed to evaluate cryptographic performance on NPs, particularly that of processor and memory subsystem. By running NPCryptBench on Intel IXP network processors, we provide quantitative evidence that performance bottlenecks under such a highly parallel environment reside in memory hierarchy and prolonged access latency, instead of limited computing resources described in recent literature. To alleviate this memory-wall effect, we suggest several software optimizations, which averagely boost the benchmark throughput by 145% on Intel IXP2800. Our analysis and optimizations are also suitable for other NPs with similar architectures.
Starting Page 49
Ending Page 56
Page Count 8
File Format PDF
DOI 10.1145/1152779.1147359
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2005-09-17
Access Restriction Subscribed
Subject Keyword Performance evaluation Cryptographic algorithm Network processor Npcryptbench
Content Type Text
Resource Type Article
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