NDLI: Reviewers ( PACT '03 )

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Message from the General Chairs

Message from the PC Chairs

Organizing Committee

Program Committee

Steering Committee

Single-Chip Multiprocessors: The Rebirth of Parallel Processing

Constraint Graph Analysis of Multithreaded Programs

The Impact of Resource Partitioning on SMT Processors

Initial Observations of the Simultaneous Multithreading Pentium 4 Processor

Efficient Resource Management during Instruction Scheduling for the EPIC Architecture

Instruction Replication: Reducing Delays Due to Inter-PE Communication Latency

Y-Branches: When You Come to a Fork in the Road, Take It

Optimizing Program Locality Through CMEs and GAs

Miss Rate Prediction across All Program Inputs

Compiler-Directed Content-Aware Prefetching for Dynamic Data Structures

Challenges and New Approaches to Program Analysis

Combining Program Recovery, Auto-Parallelisation and Locality Analysis for C Programs on Multi-Processor Embedded Systems

Inter-Procedural Loop Fusion, Array Contraction and Rotation

Spill Code Minimization by Spill Code Motion

Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU

An Efficient Online Path Profiling Framework for Java Just-In-Time Compilers

Compressing Extended Program Traces Using Value Predictors

Using Software Logging to Support Multi-Version Buffering in Thread-Level Speculation

Reactive Multi-Word Synchronization for Multiprocessors

Design Trade-Offs in High-Throughput Coherence Controllers

Memory Hierarchy Design for a Multiprocessor Look-up Engine

Biomedical Computing and Visualization

Characterizing and Predicting Program Behavior and its Variability

Redeeming IPC as a Performance Metric for Multithreaded Programs

Picking Statistically Valid and Early Simulation Points

Reducing Datapath Energy through the Isolation of Short-Lived Operands

Resolving Register Bank Conflicts for a Network Processor

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Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in