NDLI: Reviewers ( PACT '02 )

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Message from the General Chairs

Message from the Program Chairs

Organizing Committee

Steering Committee

Program Committee

Parallelism in Mainstream Enterprise Platforms of the Future

An Evaluation of Data-Parallel Compiler Support for Line-Sweep Applications

Increasing and Detecting Memory Address Congruence

Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance

Compiler-Controlled Caching in Superword Register Files for Multimedia Extension Architectures

Effective Compilation Support for Variable Instruction Set Architecture

A Framework for Parallelizing Load/Stores on Embedded Processors

Workload Design: Selecting Representative Program-Input Pairs

Dataflow Frequency Analysis Based on Whole Program Paths

Quantifying Instruction Criticality

The Role of Computational Science in Energy Efficiency and Renewable Energy

Application Transformations for Energy and Performance-Aware Device Management

Leakage Energy Management in Cache Hierarchies

Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power

The Use of Prediction for Accelerating Upgrade Misses in cc-NUMA Multiprocessors

Predicting Conditional Branches With Fusion-Based Hybrid Predictors

Speculative Sequential Consistency with Little Custom Storage

Cost-Effective Compiler Directed Memory Prefetching and Bypassing

Using the Compiler to Improve Cache Replacement Decisions

Software Bubbles: Using Predication to Compensate for Aliasing in Software Pipelines

Speculative Alias Analysis for Executable Code

Cost Effective Memory Dependence Prediction using Speculation Levels and Color Sets

The Computational Grid: Aggregating Performance and Enhanced Capability from Federated Resources

Just-In-Time Java? Compilation for the Itanium® Processor

Eliminating Exception Constraints of Java Programs for IA-64

Optimizing Loop Performance for Clustered VLIW Architectures

Exploiting Pseudo-Schedules to Guide Data Dependence Graph Partitioning

Efficient Interconnects for Clustered Microarchitectures

SIGARCH Conference Guidelines

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Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in