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  1. Proceedings of International Workshop on Manycore Embedded Systems (MES '14)
  2. A Virtualization Framework for IOMMU-less Many-Core Accelerators
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Adaptive Cache Bypass and Insertion for Many-core Accelerators
On the Relevance of Architectural Awareness for Efficient Fork/Join Support on Cluster-Based Manycores
A Low-resource and Scalable Strategy for Segment Partitioning of Many-core Nano Networks
A Stream Buffer Mechanism for Pervasive Splitting Transformations on Polyhedral Process Networks
A Virtualization Framework for IOMMU-less Many-Core Accelerators
Acceleration of Software Transactional Memory through Hardware Clock
Adaptive Compute-phase Prediction and Thread Prioritization to Mitigate Memory Access Latency
A GALS Router for Asynchronous Network-on-Chip
Hardware Threading Techniques for Multi-Threaded MPSoCs
A Closed Loop Control based Power Manager for WiNoC Architectures
Exploring Spiking Neural Network on Coarse-Grain Reconfigurable Architectures

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A Virtualization Framework for IOMMU-less Many-Core Accelerators

Content Provider ACM Digital Library
Author Benini, Luca Marongiu, Andrea Pinto, Christian
Abstract Modern high-end embedded systems are designed as sophisticated systems-on-chip (SoC) composed of a virtualization-ready multi-core processor (the host) coupled to programmable manycore accelerators (PMCA). To tackle the increased programming complexity, the roadmap of several major industrial players envisions dedicated HW support to allow host and PMCA to communicate via shared virtual memory. I/O memory management units (IOMMU) and other HW are required to allow coherent virtual memory sharing. Currently no embedded heterogeneous SoC exist that provides such support, and it is unclear if the required HW will fit the tight area and energy budgets of such designs. However, providing the abstraction of a shared memory is very relevant to simplify programming of heterogeneous SoCs, as well as techniques to extend virtualization support to the manycore. We present in this work a software infrastructure which enables such support in absence of dedicated HW. The proposed mechanism is based on standard Linux KVM, and relies on (transparent) memory copies to resolve virtual-to-physical address translation. We describe an implementation for a real heterogeneous SoC and provide a detailed analysis of the cost of our SW-only solution.
Starting Page 33
Ending Page 40
Page Count 8
File Format PDF
ISBN 9781450328227
DOI 10.1145/2613908.2613910
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2014-06-15
Publisher Place New York
Access Restriction Subscribed
Subject Keyword Manycores Iommu Heterogeneous soc
Content Type Text
Resource Type Article
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