NDLI: Fast support for unstructured data processing: the unified automata processor

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Fast support for unstructured data processing: the unified automata processor

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Fast support for unstructured data processing: the unified automata processor

Content Provider	ACM Digital Library
Author	Fang, Yuanwei Hoang, Tung T. Becchi, Michela Chien, Andrew A.
Abstract	We propose the Unified Automata Processor (UAP), a new architecture that provides general and efficient support for finite automata (FA). The UAP supports a wide range of existing finite automata models (DFAs, NFAs, A-DFAs, JFAs, counting-DFAs, and counting-NFAs), and future novel FA models. Evaluation on realistic workloads shows that UAP implements all models efficiently, achieving line rates 94.5% of ideal. A single UAP lane delivers line rates 50x greater than software approaches on CPUs and GPUs. Scaling UAP to 64 lanes achieves FA transition throughputs as high as 295 Gbps, more than 100x higher than CPUs and GPUs, and even exceeding ASIC approaches such as IBM's RegX by 6x. With efficient support for multiple input streams, UAP achieves throughputs that saturate even high speed stacked DRAM memory systems. The UAP design and implementation is efficient in instructions executed, memory references, and energy. UAP achieves a 1.2 Ghz clock rate (32nm TSMC CMOS), and a 64-lane UAP requires only 2.2 $mm^{2}$ and 563 mW. At these levels of performance and energy-efficiency, UAP is a promising candidate for integration into general-purpose computing architectures.
Starting Page	533
Ending Page	545
Page Count	13
File Format	PDF
ISBN	9781450340342
DOI	10.1145/2830772.2830809
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2015-12-05
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Processor Finite automata Computer architecture Pattern-matching Custom architecture Data processing Energy-efficient
Content Type	Text
Resource Type	Article

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