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Content Provider | ACM Digital Library |
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Author | Du, Yu Zhou, Miao Melhem, Rami Childers, Bruce R. Mosse, Daniel |
Abstract | Phase-Change Memory (PCM) has emerged as a promising low-power candidate to replace DRAM in main memory. Hybrid memory architecture comprised of a large PCM and a small DRAM is a popular solution to mitigate undesirable characteristics of PCM writes. Because PCM writes are much slower than reads, writebacks from the last-level cache consume a large portion of memory bandwidth, and thus, impact performance. Effectively utilizing shared resources, such as the last-level cache and the memory bandwidth, is crucial to achieving high performance for multi-core systems. Although existing memory bandwidth allocation schemes improve system performance, no current approach uses writeback information to partition bandwidth for hybrid memory. We use a writeback-aware analytic model to derive the allocation strategy for bandwidth partitioning of phase-change memory. From the derivation of the model, Writeback-aware Bandwidth Partitioning (WBP) is proposed as a new runtime mechanism to partition PCM service cycles among applications. WBP uses a partitioning weight to indicate the importance of writebacks (in addition to LLC misses) to bandwidth allocation. A companion Dynamic Weight Adjustment (DWA) scheme dynamically selects the partitioning weight to maximize system performance. Simulation results show that WBP and DWA improve performance by 24.9% (weighted speedup) over bandwidth partitioning schemes that do not take writebacks into consideration in a 8-core system. |
Starting Page | 113 |
Ending Page | 122 |
Page Count | 10 |
File Format | |
ISBN | 9781479910212 |
Language | English |
Publisher | Association for Computing Machinery (ACM) |
Publisher Date | 2013-10-07 |
Access Restriction | Subscribed |
Subject Keyword | Analytic model Memory bandwidth Partitioning Phase change memory |
Content Type | Text |
Resource Type | Article |
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