NDLI: Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery

Please wait, while we are loading the content...

Message from the General and Program Chairs

Committees

Reviewers

Microarchitecture and Design Challenges for Gigascale Integration

Dynamic Strands: Collapsing Speculative Dependence Chains for Reducing Pipeline Communication

Dataflow Mini-Graphs: Amplifying Superscalar Capacity and Bandwidth

Application-Specific Processing on a General-Purpose Core via Transparent Instruction Set Customization

MicroLib: A Case for the Quantitative Comparison of Micro-Architecture Mechanisms

Automatic Synthesis of High-Speed Processor Simulators

Thermal Modeling, Characterization and Management of On-Chip Networks

Pinpointing Representative Portions of Large Intel® Itanium® Programs with Dynamic Instrumentation

The Fuzzy Correlation between Code and Performance Predictability

Whole Execution Traces

Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery

Control Flow Optimization Via Dynamic Reconvergence Prediction

Single-Chip Multiprocessors: The Next Wave of Computer Architecture Innovation

A Case for Clumsy Packet Processors

Dynamically Trading Frequency for Complexity in a GALS Microprocessor

Dynamically Controlled Resource Allocation in SMT Processors

Balanced Multithreading: Increasing Throughput via a Low Cost Multithreading Hierarchy

Conjoined-Core Chip Multiprocessing

Hardware and Binary Modification Support for Code Pointer Protection From Buffer Overflow

Minos: Control Data Attack Prevention Orthogonal to Memory Model

A Hardware-Software Platform for Intrusion Prevention

RIFLE: An Architectural Framework for User-Centric Information-Flow Security

Efficient Resource Sharing in Concurrent Error Detecting Superscalar Microarchitectures

AccMon: Automatically Detecting Memory-Related Bugs via Program Counter-Based Invariants

Optimal Superblock Scheduling Using Enumeration

Compiler Optimizations for Transaction Processing Workloads on Itanium® Linux Systems

Managing Wire Delay in Large Chip-Multiprocessor Caches

Cache Refill/Access Decoupling for Vector Machines

Adaptive History-Based Memory Schedulers

Memory Controller Optimizations for Web Servers

Author Index

Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery

Content Provider	ACM Digital Library
Author	Armstrong, David N. Kim, Hyesoon Mutlu, Onur Patt, Yale N.
Abstract	Control and data speculation are widely used to improve processor performance. Correct speculation can reduce execution time, but incorrect speculation can lead to increased execution time and greater energy consumption. This paper proposes a mechanism to leverage unexpected program behavior, called wrong-path events, that occur during periods of incorrect speculation. A wrong-path event is an instance of illegal or unusual program behavior that is more likely to occur on the wrong path than on the correct path, such as a NULL pointer dereference. When a wrong-path event occurs, the processor can predict that it is on the wrong path and speculatively initiate misprediction recovery. The purpose of the proposed mechanism is to improve the effectiveness of speculative execution in a processor by helping to insure that the processor remain "on the correct path" throughout periods of speculative execution. We describe a set of wrong-path events which can be used as strong indicators of misprediction. We find that on average 5% of the mispredicted branches in the SPEC2000 integer benchmarks produce a wrong-path event an average of 51 cycles before the branch is executed. We show that once a wrong-path event occurs, it is possible to accurately predict which unresolved branch in the processor is mispredicted using a simple, novel prediction mechanism. We discuss the advantages and shortcomings of wrong-path events and propose new areas for future research.
Starting Page	119
Ending Page	128
Page Count	10
File Format	PDF
ISBN	0769521266
ISSN	10724451
DOI	10.1109/MICRO.2004.38
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2004-12-04
Access Restriction	Subscribed
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Wrong Path Events : Exploiting Illegal and Unusual Program Behavior for Early Misprediction Recovery

Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery

Wrong path events: Exploiting unusual and illegal program behavior for early misprediction detection and recovery (2004)

Wrong path events: Exploiting unusual and illegal program behavior for early misprediction detection and recovery (2004)

Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early (2004)

Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early (2004)

Early misprediction recovery (2004).

Recovery Mechanism for Latency Misprediction

Fast branch misprediction recovery in out-of-order superscalar processors

Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery

Similar Documents

Wrong Path Events : Exploiting Illegal and Unusual Program Behavior for Early Misprediction Recovery

Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery

Wrong path events: Exploiting unusual and illegal program behavior for early misprediction detection and recovery (2004)

Wrong path events: Exploiting unusual and illegal program behavior for early misprediction detection and recovery (2004)

Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early (2004)

Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early (2004)

Early misprediction recovery (2004).

Recovery Mechanism for Latency Misprediction

Fast branch misprediction recovery in out-of-order superscalar processors

Wrong Path Events: Exploiting Unusual and Illegal Program Behavior for Early Misprediction Detection and Recovery