NDLI: Differential Evolution to Reduce Energy Consumption in Three-Level Memory Hierarchy

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Differential Evolution to Reduce Energy Consumption in Three-Level Memory Hierarchy

Content Provider	ACM Digital Library
Author	Nunes, L. J. C. Silva-Filho, A. G. Lacerda, H. F.
Abstract	This paper presents an improved differential evolution (DE) algorithm for multi-objective optimization in the discrete domain, applied to a cache memory hierarchy exploration problem, aiming to reduce the energy consumption and to increase the performance to process an embedded application. The architecture exploration is based on cache parameters adjustments and the memory hierarchy is composed of three levels of cache memory. A model of LPDDR2 memory (Low Power DDR2) was adopted to simulate the main memory and a recent cache memory model based on 32 nm transistor technology was used. In these experiments, the proposed algorithm was applied to nine different applications from the MiBench and the MediaBenchII suites. Furthermore, the performance of the proposed strategy was compared with those of SPEA2 and NSGAII optimization mechanisms. The metrics selected to compare the quality of the Pareto front found for each of those algorithms were the hypervolume and the generational distance. The results show that the proposed strategy based on DE optimization algorithm applied to memory hierarchy exploration problem obtained better results for both indicators, achieving improvements in 100% and 78% of cases in both metrics mentioned respectively.
Starting Page	1
Ending Page	6
Page Count	6
File Format	PDF
ISBN	9781450337632
DOI	10.1145/2800986.2801005
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2015-08-31
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Energy consumption Differential evolution Multi-objective optimization L3 cache Memory exploration
Content Type	Text
Resource Type	Article

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