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| Content Provider | ACM Digital Library |
|---|---|
| Author | Torrellas, Josep Mehta, Sanyam |
| Abstract | Lately, the industry has recognized immense potential in wearables (particularly, smartwatches) being an attractive alternative/supplement to the smartphone. To this end, there has been recent activity in making the smartwatch `self-sufficient' i.e. using it to make/receive calls, etc. independently of the phone. This marked shift in the way wearables will be used in future calls for changes in the core micro-architecture of smartwatch processors. In this work, we first identify ten key target applications for the smartwatch users that the processor must be able to quickly and efficiently execute. We show that seven of these workloads are inherently parallel, and are compute- and data-intensive. We therefore propose to use a multi-core processor with simple out-of-order cores (for compute performance) and augment them with a light-weight software-assisted hardware prefetcher (for memory performance). This simple core with the light-weight prefetcher, called WearCore, is 2.9x more energy-efficient and 2.8x more area-efficient over an in-order core. The improvements are similar with respect to an out-of-order core. |
| Starting Page | 153 |
| Ending Page | 164 |
| Page Count | 12 |
| File Format | |
| ISBN | 9781450341219 |
| DOI | 10.1145/2967938.2967956 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2016-09-11 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Subject Keyword | Wearbench Digital assistant Image recognition Dnn Speech recognition Wearables Wearcore |
| Content Type | Text |
| Resource Type | Article |
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