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| Content Provider | ACM Digital Library |
|---|---|
| Author | Mukherjee, Shubhendu S. Hill, Mark D. |
| Abstract | This paper considers alternative directory protocols for providing cache coherence in shared-memory multiprocessors with 32 to 128 processors, where the state requirements of DirN may be considered too large. We consider DiriB, i=1,2,4, DirN, Tristate (also called superset), Coarse Vector, and three new protocols. The new protocols—Gray-hardward, Gray-software, Home—are optimizations of Tristate that use gray coding to favor near-neighbor sharing.Our results are the first to compare all these protocols with complete applications (and the first evaluation of Tristate with a non-synthetic workload). Results for three applications—ocean (one-dimensional sharing), appbt (three-dimensional sharing), and barnes (dynamic sharing)—for 128 processors on the Wisconsin Wind Tunnel show that (a)Diri B sends 15 to 43 times as many invalidation messages as DirN, (b) Gray-software sends 1.0 to 4.7 times as many messages as DirN, making it better than Tristate, Gray-hardware, and Home, and (c) the choice between DiriB, Coarse Vector, and Gray-software depends on whether one wants to optimize for few sharers (DiriB), many sharers (Coarse Vector), or hedge one's bets betweem both alternatives (Gray-software). |
| Starting Page | 64 |
| Ending Page | 74 |
| Page Count | 11 |
| File Format | |
| ISBN | 0897916654 |
| DOI | 10.1145/181181.181271 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 1994-07-16 |
| Publisher Place | New York |
| Access Restriction | Subscribed |
| Subject Keyword | Cache coherence Directory protocols Gray code Multiprocessors Shared-memory |
| Content Type | Text |
| Resource Type | Article |
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