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| Content Provider | ACM Digital Library |
|---|---|
| Author | Paul, Somnath Bhunia, Swarup Wang, Xinmu Narasimhan, Seetharam |
| Abstract | Heterogeneity, programmability and parallelism are expected to be the key drivers for future nanoelectronics systems. The proposed work builds on these key drivers to achieve an energy-efficient, adaptive, and reliable computing framework. The primary intellectual merit of this effort lies in the heterogeneous integration of two fundamentally different state variables - charge-based electronics and electromechanical. We exploit the complementary capabilities of the two layers - high-performance operation of nanoscale FET and ultralow-power and harsh environment operation of NEMS - to merge the benefit of both. The layers are used in a symbiotic manner where each addresses the limitations of the other. The leakage/programmability issues in FET layer are addressed by exploiting the near-zero leakage and low ON-resistance of NEMS switches. The reliability and drivability issues of NEMS layer are addressed by FETs. The innovative memory based computing architecture exploits the density advantage of nanoscale memory to reduce the programmable interconnect overhead of traditional reconfigurable computing. It enables realizing custom computing functions in a core-based architecture to improve energy efficiency through hardware acceleration. The fundamental questions on the effectiveness of nanomechanical computing and the physics of its interaction with charge-based nanoelectronics are investigated. |
| Starting Page | 210 |
| Ending Page | 217 |
| Page Count | 8 |
| File Format | |
| ISBN | 9781457709937 |
| DOI | 10.1109/NANOARCH.2011.5941506 |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2011-06-08 |
| Access Restriction | Subscribed |
| Content Type | Text |
| Resource Type | Article |
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