NDLI: Anomalous path detection with hardware support

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Exploiting pipelining to relax register-file port constraints of instruction-set extensions

Anomalous path detection with hardware support

Compilation techniques for energy reduction in horizontally partitioned cache architectures

Optimizing stream programs using linear state space analysis

Architectural support for real-time task scheduling in SMT processors

The microarchitecture of FPGA-based soft processors

A second-generation sensor network processor with application-driven memory optimizations and out-of-order execution

Balancing register pressure and context-switching delays in ASTI systems

How compilers and tools differ for embedded systems

Exploring the design space of LUT-based transparent accelerators

Hardware support for code integrity in embedded processors

A post-compilation register reassignment technique for improving hamming distance code compression

Compiler-directed proactive power management for networks

Intra-task scenario-aware voltage scheduling

Virtual multiprocessor: an analyzable, high-performance architecture for real-time computing

A dual-processor solution for the MAC layer of a software defined radio terminal

Developing embedded multi-threaded applications with CATAPULTS, a domain-specific language for generating thread schedulers

Automating custom-precision function evaluation for embedded processors

Segment protection for embedded systems using run-time checks

Verifiable annotations for embedded java environments

Equivalence checking of arithmetic expressions using fast evaluation

Energy aware kernel for hard real-time systems

An Esterel processor with full preemption support and its worst case reaction time analysis

Instruction set extensions for software defined radio on a multithreaded processor

Micro embedded monitoring for security in application specific instruction-set processors

Energy management for commodity short-bit-width microcontrollers

SECA: security-enhanced communication architecture

Memory allocation for embedded systems with a compile-time-unknown scratch-pad size

Single appearance schedule with dynamic loop count for minimum data buffer from synchronous dataflow graphs

MTSS: multi task stack sharing for embedded systems

Fast and fair: data-stream quality of service

Software-directed power-aware interconnection networks

Anomalous path detection with hardware support

Content Provider	ACM Digital Library
Author	Zhang, Tao Lee, Wenke Zhuang, Xiaotong Pande, Santosh
Abstract	Embedded systems are being deployed as a part of critical infrastructures and are vulnerable to malicious attacks due to internet accessibility. Intrusion detection systems have been proposed to protect computer systems from unauthorized penetration. Detecting an attack early on pays off since further damage is avoided and in some cases, resilient recovery could be adopted. This is especially important for embedded systems deployed in critical infrastructures such as Power Grids etc. where a timely intervention could save catastrophes. An intrusion detection system monitors dynamic program behavior against normal program behavior and raises an alert when an anomaly is detected. The normal behavior is learnt by the system through training and profiling.However, all current intrusion detection systems are purely software based and thus suffer from large performance degradation due to constant monitoring operations inserted in application code. Due to the potential performance overheads, software based solutions cannot monitor program behavior at a very fine level of granularity, thus leaving potential security holes as shown in the literature. Another important drawback of such methods is that they are unable to detect intrusions in near real time and the time lag could prove disastrous in real time embedded systems. In this paper, we propose a hardware-based approach to verify program execution paths of target applications dynamically and to detect anomalous executions. With hardware support, our approach offers multiple advantages over software based solutions including minor performance degradation, much stronger detection capability (a larger variety of attacks get detected) and zero-latency reaction upon an anomaly for near real time detection and thus much better security.
Starting Page	43
Ending Page	54
Page Count	12
File Format	PDF
ISBN	159593149X
DOI	10.1145/1086297.1086305
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2005-09-24
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Control flow monitoring Hardware support Anomalous path Monitoring granularity Anomaly detection
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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