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  1. Proceedings of the 11th International Workshop on Data Management on New Hardware (DaMoN'15)
  2. NUMA obliviousness through memory mapping
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Energy-Efficient In-Memory Data Stores on Hybrid Memory Hierarchies
Beyond the Wall: Near-Data Processing for Databases
Scaling the Memory Power Wall With DRAM-Aware Data Management
NUMA obliviousness through memory mapping
By their fruits shall ye know them: A Data Analyst's Perspective on Massively Parallel System Design
TLB misses: The Missing Issue of Adaptive Radix Tree?
Applying HTM to an OLTP System: No Free Lunch
The Serial Safety Net: Efficient Concurrency Control on Modern Hardware
Efficient Lightweight Compression Alongside Fast Scans
Energy-Efficient Query Processing on Embedded CPU-GPU Architectures
Toward GPUs being mainstream in analytic processing: An initial argument using simple scan-aggregate queries
Ultra-Fast Similarity Search Using Ternary Content Addressable Memory

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Thesis

NUMA obliviousness through memory mapping

Content Provider ACM Digital Library
Author Kersten, Martin Gawade, Mrunal
Abstract With the rise of multi-socket multi-core CPUs a lot of effort is being put into how to best exploit their abundant CPU power. In a shared memory setting the multi-socket CPUs are equipped with their own memory module, and access memory modules across sockets in a non-uniform access pattern (NUMA). Memory access across socket is relatively expensive compared to memory access within a socket. One of the common solutions to minimize across socket memory access is to partition the data, such that the data affinity is maintained per socket. In this paper we explore the role of memory mapped storage to provide transparent data access in a NUMA environment, without the need of explicit data partitioning. We compare the performance of a database engine in a distributed setting in a multi-socket environment, with a database engine in a NUMA oblivious setting. We show that though the operating system tries to keep the data affinity to local sockets, a significant remote memory access still occurs, as the number of threads increase. Hence, setting explicit process and memory affinity results into a robust execution in NUMA oblivious plans. We use micro-experiments and SQL queries from the TPC-H benchmark to provide an in-depth experimental exploration of the landscape, in a four socket Intel machine.
Starting Page 1
Ending Page 7
Page Count 7
File Format PDF
ISBN 9781450336383
DOI 10.1145/2771937.2771948
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2015-05-31
Publisher Place New York
Access Restriction Subscribed
Subject Keyword Memory mapped io Multi-socket cpus Numa
Content Type Text
Resource Type Article
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