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  1. Proceedings of the 11th International Workshop on Data Management on New Hardware (DaMoN'15)
  2. Scaling the Memory Power Wall With DRAM-Aware Data Management
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Energy-Efficient In-Memory Data Stores on Hybrid Memory Hierarchies
Beyond the Wall: Near-Data Processing for Databases
Scaling the Memory Power Wall With DRAM-Aware Data Management
NUMA obliviousness through memory mapping
By their fruits shall ye know them: A Data Analyst's Perspective on Massively Parallel System Design
TLB misses: The Missing Issue of Adaptive Radix Tree?
Applying HTM to an OLTP System: No Free Lunch
The Serial Safety Net: Efficient Concurrency Control on Modern Hardware
Efficient Lightweight Compression Alongside Fast Scans
Energy-Efficient Query Processing on Embedded CPU-GPU Architectures
Toward GPUs being mainstream in analytic processing: An initial argument using simple scan-aggregate queries
Ultra-Fast Similarity Search Using Ternary Content Addressable Memory

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Scaling the Memory Power Wall With DRAM-Aware Data Management

Content Provider ACM Digital Library
Author Olma, Matthaios Appuswamy, Raja Ailamaki, Anastasia
Abstract Improving the energy efficiency of database systems has emerged as an important topic of research over the past few years. While significant attention has been paid to optimizing the power consumption of tradition disk-based databases, little attention has been paid to the growing cost of DRAM power consumption in main-memory databases (MMDB). In this paper, we bridge this divide by examining power--performance tradeoffs involved in designing MMDBs. In doing so, we first show how DRAM will soon emerge as the dominating source of power consumption in emerging MMDB servers unlike traditional database servers, where CPU power consumption overshadows that of DRAM. Second, we show that using DRAM frequency scaling and power-down modes can provide substantial improvement in performance/Watt under both transactional and analytical workloads. This, again contradicts rules of thumb established for traditional servers, where the most energy-efficient configuration is often the one with highest performance. Based on our observations, we argue that the long-overlooked task of optimizing DRAM power consumption should henceforth be considered a first-class citizen in designing MMDBs. In doing so, we highlight several promising research directions and identify key design challenges that must be overcome towards achieving this goal.
Starting Page 1
Ending Page 9
Page Count 9
File Format PDF
ISBN 9781450336383
DOI 10.1145/2771937.2771947
Language English
Publisher Association for Computing Machinery (ACM)
Publisher Date 2015-05-31
Publisher Place New York
Access Restriction Subscribed
Content Type Text
Resource Type Article
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