NDLI: D-PUF: an intrinsically reconfigurable DRAM PUF for device authentication in embedded systems

Please wait, while we are loading the content...

ILP-based modulo scheduling for high-level synthesis

Enabling OpenVX support in mW-scale parallel accelerators

Handling large data sets for high-performance embedded applications in heterogeneous systems-on-chip

Power and thermal management in massive multicore chips: theoretical foundation meets architectural innovation and resource allocation

Runtime management of adaptive MPSoCs for graceful degradation

Towards the design of fault-tolerant mixed-criticality systems on multicores

COMET: communication-optimised multi-threaded error-detection technique

Neural network transformation under hardware constraints

RRAM based learning acceleration

A real-time digital-microfluidic platform for epigenetics

LOCUS: low-power customizable many-core architecture for wearables

D-PUF: an intrinsically reconfigurable DRAM PUF for device authentication in embedded systems

Hybrid network-on-chip architectures for accelerating deep learning kernels on heterogeneous manycore platforms

CaffePresso: an optimized library for deep learning on embedded accelerator-based platforms

Matrix multiplication beyond auto-tuning: rewrite-based GPU code generation

Speculative disassembly of binary code

A jump-target identification method for multi-architecture static binary translation

On-the-fly load data value tracing in multicores

Redesigning a tagless access buffer to require minimal ISA changes

Thrifty-malloc: A HW/SW codesign for the dynamic management of hardware transactional memory in embedded multicore systems

FastCollect: offloading generational garbage collection to integrated GPUs

D-PUF: an intrinsically reconfigurable DRAM PUF for device authentication in embedded systems

Content Provider	ACM Digital Library
Author	Raha, Arnab Sutar, Soubhagya Raghunathan, Vijay
Abstract	Physically Unclonable Functions (PUFs) have proved to be effective and low-cost measure against counterfeiting by providing device authentication and secure key storage services. Memory based PUF implementations are an attractive option due to the ubiquitous nature of memory in electronic devices and the requirement of minimal (or no) additional circuitry. DRAM based PUFs are particularly advantageous due to their large address space and multiple controllable parameters during response generation. However, prior works on DRAM PUFs use a static response generation mechanism making them vulnerable to security attacks. Further, they result in very slow device authentication, are not applicable to off-the-shelf DRAM modules, or require DRAM power cycling prior to authentication. In this paper, we propose D-PUF, an intrinsically reconfigurable DRAM PUF based on refresh pausing. A key feature of the proposed DRAM PUF is that it can be reconfigured by varying the refresh-pause interval, which changes it's challenge-response behavior, making it robust against various attacks. We use the PUF to design a secure, low-overhead methodology for performing device authentication. The design is implemented and validated using an Altera Stratix IV GX FPGA based Terasic TR4-230 development board and several off-the-shelf 1GB DDR3 DRAM modules. Our experimental results demonstrate a 4.3×-6.4× reduction in authentication time, compared to previous work. Using controlled temperature and accelerated aging tests, we also demonstrate the robustness of our authentication mechanism to temperature variations and aging effects.
Starting Page	1
Ending Page	10
Page Count	10
File Format	PDF
ISBN	9781450344821
DOI	10.1145/2968455.2968519
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2016-10-01
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Hardware security Authentication Physically unclonable function Memory puf
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

System-of-PUFs: multilevel security for embedded systems

System-of-PUFs: Multilevel security for embedded systems

A Self-Authenticating Chip Architecture Using an Intrinsic Fingerprint of Embedded DRAM

Device aging-based physically unclonable functions

Recyclable pufs: logically reconfigurable pufs ⋆.

Differential public physically unclonable functions: architecture and applications

DWM-PUF: A low-overhead, memory-based security primitive

SR Flip-Flop Based Physically Unclonable Function (PUF) for Hardware Security

Spintronics for associative computation and hardware security

D-PUF: an intrinsically reconfigurable DRAM PUF for device authentication in embedded systems

Similar Documents

System-of-PUFs: multilevel security for embedded systems

System-of-PUFs: Multilevel security for embedded systems

A Self-Authenticating Chip Architecture Using an Intrinsic Fingerprint of Embedded DRAM

Device aging-based physically unclonable functions

Recyclable pufs: logically reconfigurable pufs ⋆.

Differential public physically unclonable functions: architecture and applications

DWM-PUF: A low-overhead, memory-based security primitive

SR Flip-Flop Based Physically Unclonable Function (PUF) for Hardware Security

Spintronics for associative computation and hardware security

D-PUF: an intrinsically reconfigurable DRAM PUF for device authentication in embedded systems