NDLI: History-Assisted Adaptive-Granularity Caches (HAAG\$) for High Performance 3D DRAM Architectures

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History-Assisted Adaptive-Granularity Caches (HAAG\$) for High Performance 3D DRAM Architectures

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History-Assisted Adaptive-Granularity Caches (HAAG\$) for High Performance 3D DRAM Architectures

Content Provider	ACM Digital Library
Author	Xie, Yuan Li, Sheng Brockman, Jay B. Muralimanohar, Naveen O, Seongil Zhao, Jishen Xu, Cong Ahn, Jung Ho Jouppi, Norman P. Chen, Ke
Abstract	3D-stacked DRAM has the potential to provide high performance and large capacity memory for future high performance computing systems and datacenters, and the integration of a dedicated logic die opens up opportunities for architectural enhancements such as DRAM row-buffer caches. However, high performance and cost-effective row-buffer cache designs remain challenging for 3D memory systems. In this paper, we propose History-Assisted Adaptive-Granularity Cache (HAAG\$) that employs an adaptive caching scheme to support full associativity at various granularities, and an intelligent history-assisted predictor to support a large number of banks in 3D memory systems. By increasing the row-buffer cache hit rate and avoiding unnecessary data caching, HAAG\$ significantly reduces memory access latency and dynamic power. Our design works particularly well for manycore CPUs running (irregular) memory intensive applications where memory locality is hard to exploit. Evaluation results show that with memory-intensive CPU workloads, HAAG\$ can outperform the state-of-the-art row buffer cache by 33.5%.
Starting Page	251
Ending Page	261
Page Count	11
File Format	PDF
ISBN	9781450335591
DOI	10.1145/2751205.2751227
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2015-06-08
Publisher Place	New York
Access Restriction	Subscribed
Subject Keyword	Haag$ Row buffer cache Adaptive granularity 3d dram
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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