NDLI: Hardware-managed register allocation for embedded processors

Content Provider	ACM Digital Library
Author	Zhang, Tao Zhuang, Xiaotong Pande, Santosh
Abstract	Most modern processors (either embedded or general purpose) contain higher number of physical registers than those exposed in the ISA. Due to a variety of reasons, this phenomenon is likely to continue especially on embedded systems where encoding space is very limited. Saving the encoding space leads to lower power consumption in the I-cache; on the other hand, harnessing more physical registers saves power in the memory subsystem and reduces latency as well. These design decisions however result in the difficulty of register allocation for a compiler due to limited number of exposed registers at ISA level.In this paper, we therefore propose a hardware managed register allocation scheme to allocate more physical registers at runtime and to utilize them. As a byproduct, we also show that hardware managed register allocation has other merits such as better exploitation of low register pressure regions, more flexible management of caller-save/callee-save registers, etc.Our approach consists of both compiler and hardware enhancements. On the compiler side we assign variables at various stack offsets such that the offsets indicate the relative allocation priorities at runtime. The hardware is modified to identify such spills and make decisions whether they should be put in the (invisible) physical registers based on their relative priorities. Finally, our results show slight improvement in the instructions per cycle counts (IPC) but significant power consumption reduction in the cache.
Starting Page	192
Ending Page	201
Page Count	10
File Format	PDF
ISSN	03621340 15581160
DOI	10.1145/998300.997191
Journal	ACM SIGPLAN Notices (SIGP)
Volume Number	39
Issue Number	7
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1983-05-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Embedded systems Power consumption Physical registers Architected registers Register allocation
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Software

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