NDLI: Migration of long-running Tasks between Reconfigurable Resources using Virtualization

Content Provider	ACM Digital Library
Author	Knodel, Oliver Spallek, Rainer G. Genssler, Paul R.
Abstract	Computing performance and scalability are the essential basics in modern data centres. Field Programmable Gate Arrays (FPGAs) provide a promising opportunity to improve performance, security and energy efficiency. Especially background acceleration of computationally complex and long-running tasks is an important field of application. A flexible use of reconfigurable devices within a cloud context requires an abstraction of the actual hardware through virtualization. In this paper we present an approach inspired by paravirtualized machines for the integration of reconfigurable hardware into cloud services. Using partial reconfiguration our hardware and software framework virtualizes a single physical FPGA to enable multiple independent user designs. Essential components are the management of those virtual user-defined accelerators (vFPGA) and their migration between physical FPGAs to achieve higher system-wide utilization. The migration requires saving and restoring the internal state or context of the vFPGA. We demonstrate the application possibilities and the resource trade-off of our approach by transferring a running design from one physical FPGA to another. Moreover, we present future perspectives for the use of FPGAs in cloud-based environments.
Starting Page	56
Ending Page	61
Page Count	6
File Format	PDF
ISSN	01635964
DOI	10.1145/3039902.3039913
Journal	ACM SIGARCH Computer Architecture News (CARN)
Volume Number	44
Issue Number	4
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-04-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Cloud computing Partial reconfiguration Context migration Virtualization Field programmable gate arrays
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Virtualizing and sharing reconfigurable resources in High-Performance Reconfigurable Computing systems

Exploiting Partial Runtime Reconfiguration for High-Performance Reconfigurable Computing

Performance of partial reconfiguration in FPGA systems: A survey and a cost model

Computing Framework for Dynamic Integration of Reconfigurable Resources in a Cloud

Built-in Self-test of Logic Resources in Field Programmable Gate Arrays Using Partial Reconfiguration Built-in Self-test of Logic Resources in Field Programmable Gate Arrays Using Partial Reconfiguration Built-in Self-test of Logic Resources in Field Programmable Gate Arrays Using Partial Reconfigur

FPGAs in the Cloud: Booting Virtualized Hardware Accelerators with OpenStack

Fast Optical Reconfiguration of a Nine-Context DORGA Using a Speed Adjustment Control

Performance bounds of partial run-time reconfiguration in high-performance reconfigurable computing

An Effective Framework to Evaluate Dynamic Partial Reconfiguration in FPGA Systems

Migration of long-running Tasks between Reconfigurable Resources using Virtualization

Similar Documents

Virtualizing and sharing reconfigurable resources in High-Performance Reconfigurable Computing systems

Exploiting Partial Runtime Reconfiguration for High-Performance Reconfigurable Computing

Performance of partial reconfiguration in FPGA systems: A survey and a cost model

Computing Framework for Dynamic Integration of Reconfigurable Resources in a Cloud

FPGAs in the Cloud: Booting Virtualized Hardware Accelerators with OpenStack

Fast Optical Reconfiguration of a Nine-Context DORGA Using a Speed Adjustment Control

Performance bounds of partial run-time reconfiguration in high-performance reconfigurable computing

An Effective Framework to Evaluate Dynamic Partial Reconfiguration in FPGA Systems

Migration of long-running Tasks between Reconfigurable Resources using Virtualization