NDLI: A language for describing predictors and its application to automatic synthesis

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Volume 25, Issue 5, Dec. 1997

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Volume 25, Issue 3, June 1997

Volume 25, Issue 2, May 1997

Improving superscalar instruction dispatch and issue by exploiting dynamic code sequences

Exploiting instruction level parallelism in processors by caching scheduled groups

On deadlocks in interconnection networks

Implementing multidestination worms in switch-based parallel systems

Tolerating multiple failures in RAID architectures with optimal storage and uniform declustering

Hardware fault containment in scalable shared-memory multiprocessors

Effects of communication latency, overhead, and bandwidth in a cluster architecture

The Mercury Interconnect Architecture

The design and analysis of a cache architecture for texture mapping

Designing high bandwidth on-chip caches

Memory-system design considerations for dynamically-scheduled processors

The interaction of software prefetching with ILP processors in shared-memory systems

VM-based shared memory on low-latency, remote-memory-access networks

Efficient synchronization

Dynamic speculation and synchronization of data dependences

Dynamic instruction reuse

Complexity-effective superscalar processors

Coherence controller architectures for SMP-based CC-NUMA multiprocessors

Prefetching using Markov predictors

Data prefetching on the HP PA-8000

Target prediction for indirect jumps

The agree predictor

Trading conflict and capacity aliasing in conditional branch predictors

A language for describing predictors and its application to automatic synthesis

Run-time adaptive cache hierarchy management via reference analysis

The energy efficiency of IRAM architectures

DataScalar architectures

Volume 25, Issue 1, March 1997

A language for describing predictors and its application to automatic synthesis

Content Provider	ACM Digital Library
Author	Emer, Joel Gloy, Nikolas
Abstract	As processor architectures have increased their reliance on speculative execution to improve performance, the importance of accurate prediction of what to execute speculatively has increased. Furthermore, the types of values predicted have expanded from the ubiquitous branch and call/return targets to the prediction of indirect jump targets, cache ways and data values. In general, the prediction process is one of identifying the current state of the system, and making a prediction for some as yet uncomputed value based on that state. Prediction accuracy is improved by learning what is a good prediction for that state using a feedback process at the time the predicted value is actually computed. While there have been a number of efforts to formally characterize this process, we have taken the approach of providing a simple algebraic-style notation that allows one to express this state identification and feedback process. This notation allows one to describe a wide variety of predictors in a uniform way. It also facilitates the use of an efficient search technique called genetic programming, which is loosely modeled on the natural evolutionary process, to explore the design space. In this paper we describe our notation and the results of the application of genetic programming to the design of branch and indirect jump predictors.
Starting Page	304
Ending Page	314
Page Count	11
File Format	PDF
ISSN	01635964
DOI	10.1145/384286.264212
Journal	ACM SIGARCH Computer Architecture News (CARN)
Volume Number	25
Issue Number	2
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	1981-04-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Content Type	Text
Resource Type	Article

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