NDLI: An optimal algorithm for minimizing run-time reconfiguration delay

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ACM Transactions on Embedded Computing Systems (TECS) : Volume 16

ACM Transactions on Embedded Computing Systems (TECS) : Volume 15

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ACM Transactions on Embedded Computing Systems (TECS) : Volume 10

ACM Transactions on Embedded Computing Systems (TECS) : Volume 9

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ACM Transactions on Embedded Computing Systems (TECS) : Volume 4

ACM Transactions on Embedded Computing Systems (TECS) : Volume 3

Issue 4, November 2004

Issue 3, August 2004

Issue 2, May 2004

Editorial: Special issue on dynamically adaptable embedded systems

An optimal algorithm for minimizing run-time reconfiguration delay

A design flow for partially reconfigurable hardware

Adaptive scheduling server for power-aware real-time tasks

Blocking-aware processor voltage scheduling for real-time tasks

Dynamic adaptation for fault tolerance and power management in embedded real-time systems

The design of dynamically reconfigurable datapath coprocessors

Multitasking on reconfigurable architectures: microarchitecture support and dynamic scheduling

A self-tuning cache architecture for embedded systems

AIDA: Adaptive application-independent data aggregation in wireless sensor networks

Issue 1, February 2004

ACM Transactions on Embedded Computing Systems (TECS) : Volume 2

ACM Transactions on Embedded Computing Systems (TECS) : Volume 1

An optimal algorithm for minimizing run-time reconfiguration delay

Content Provider	ACM Digital Library
Author	Ghiasi, Soheil Sarrafzadeh, Majid Nahapetian, Ani
Copyright Year	2004
Abstract	Reconfiguration delay is one of the major barriers in the way of dynamically adapting a system to its application requirements. The run-time reconfiguration delay is quite comparable to the application latency for many classes of applications and might even dominate the application run-time. In this paper, we present an efficient optimal algorithm for minimizing the run-time reconfiguration (context switching) delay of executing an application on a dynamically adaptable system. The system is composed of a number of cameras with embedded reconfigurable resources collaborating in order to track an object. The operations required to execute in order to track the object are revealed to the system at run-time and can change according to a number of parameters, such as the target shape and proximity. Similarly, we can assume that the applications comprising tasks are already scheduled and each of them has to be realized on the reconfigurable fabric in order to be executed.The modeling and the algorithm are both applicable to partially reconfigurable platforms as well as multi-FPGA systems. The algorithm can be directly applied to minimize the application run-time for the typical classes of applications, where the actual execution delay of the basic operations is negligible compared to the reconfiguration delay. We prove the optimality and the efficiency of our algorithm. We report the experimental results, which demonstrate a 2.5--40% improvement on the total run-time reconfiguration delay as compared to other heuristics.
Starting Page	237
Ending Page	256
Page Count	20
File Format	PDF
ISSN	15399087
e-ISSN	15583465
DOI	10.1145/993396.993398
Volume Number	3
Issue Number	2
Journal	ACM Transactions on Embedded Computing Systems (TECS)
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2004-05-01
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Reconfigurable computing Instantiation ordering Reconfiguration delay
Content Type	Text
Resource Type	Article
Subject	Hardware and Architecture Software

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

An optimal algorithm for minimizing run-time reconfiguration delay

Modeling and optimizing run-time reconfiguration using evolutionary computation

A design flow for partially reconfigurable hardware

An Optimal Algorithm for Minimizing Runtime Reconfiguration Delay (2004)

Minimizing the runtime partial reconfiguration overheads in reconfigurable systems

An approximation algorithm for scheduling on heterogeneous reconfigurable resources

FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration

Hardware-software cosynthesis for run-time incrementally reconfigurable fpgas (2000).

Automating Elimination of Idle Functions by Run-Time Reconfiguration

An optimal algorithm for minimizing run-time reconfiguration delay

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An Optimal Algorithm for Minimizing Runtime Reconfiguration Delay (2004)

Minimizing the runtime partial reconfiguration overheads in reconfigurable systems

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