NDLI: Minimizing the runtime partial reconfiguration overheads in reconfigurable systems

Content Provider	Springer Nature Link
Author	Liu, Shaoshan Pittman, Richard Neil Forin, Alessandro Gaudiot, Jean Luc
Copyright Year	2011
Abstract	Configuration overhead is a major performance bottleneck of the partial reconfiguration process. In this paper, we propose a combination of two techniques to minimize the partial reconfiguration performance overhead. First, we design and implement fully streaming DMA engines to achieve a near perfect configuration throughput. Second, we exploit the configuration data redundancy through Run-Length Encoding to compress the configuration bitstreams, and we implement an intelligent ICAP (Internal Configuration Access Port) controller to perform decompression at runtime. The results show that our design achieve an effective configuration data transfer throughput that well surpasses the upper bound of data transfer throughput, 400 Mbytes/s. Specifically, our fully stream DMA engines reduce the configuration time from the range of seconds to the range of milliseconds, a more than 1000-fold improvement. In addition, our simple compression scheme achieves significant reduction of bitstream size and results in a decompression circuit with negligible hardware overhead.
Starting Page	894
Ending Page	911
Page Count	18
File Format	PDF
ISSN	09208542
Journal	The Journal of Supercomputing
Volume Number	61
Issue Number	3
e-ISSN	15730484
Language	English
Publisher	Springer US
Publisher Date	2011-07-22
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Reconfigurable computing Partial reconfiguration FPGA Computer Science Programming Languages, Compilers, Interpreters Processor Architectures
Content Type	Text
Resource Type	Article
Subject	Theoretical Computer Science Information Systems Hardware and Architecture Software

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