NDLI: Parametric variability analysis for multistage analog circuits using analytical sensitivity modeling

Content Provider	ACM Digital Library
Author	Nikolov, Plamen K. Ozev, Sule Liu, Fang
Copyright Year	2008
Abstract	Process variations play an increasingly important role on the success of analog circuits. State-of-the-art analog circuits are based on complex architectures and contain many hierarchical layers and parameters. Knowledge of the parameter variances and their contribution patterns is crucial for a successful design process. This information is valuable to find solutions for many problems in design, design automation, testing, and fault tolerance. In this article, we present a hierarchical variance analysis methodology for multistage analog circuits. Starting from the process/layout level, we derive implicit hierarchical relations and extract the sensitivity information analytically. We make use of previously computed values whenever possible so as to reduce computational time. The proposed approach is particularly geared for the domain of design and test automation, where multiple runs on slightly different circuits are necessary. Experimental results indicate that the proposed method provides both accuracy and computational efficiency when compared with prior approaches.
Starting Page	1
Ending Page	28
Page Count	28
File Format	PDF
ISSN	10844309
e-ISSN	15577309
DOI	10.1145/1344418.1344429
Volume Number	13
Issue Number	2
Journal	ACM Transactions on Design Automation of Electronic Systems (TODAES)
Language	English
Publisher	Association for Computing Machinery (ACM)
Publisher Date	2008-04-23
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Hierarchical variance analysis Analog circuits Parameter correlations Performance model Process variations
Content Type	Text
Resource Type	Article
Subject	Computer Graphics and Computer-Aided Design Computer Science Applications Electrical and Electronic Engineering

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