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| Content Provider | ACM Digital Library |
|---|---|
| Author | Hayes, John P. Markov, Igor L. Viamontes, George F. Krishnaswamy, Smita |
| Copyright Year | 2008 |
| Abstract | We propose the probabilistic transfer matrix (PTM) framework to capture nondeterministic behavior in logic circuits. PTMs provide a concise description of both normal and faulty behavior, and are well-suited to reliability and error susceptibility calculations. A few simple composition rules based on connectivity can be used to recursively build larger PTMs (representing entire logic circuits) from smaller gate PTMs. PTMs for gates in series are combined using matrix multiplication, and PTMs for gates in parallel are combined using the tensor product operation. PTMs can accurately calculate joint output probabilities in the presence of reconvergent fanout and inseparable joint input distributions. To improve computational efficiency, we encode PTMs as algebraic decision diagrams (ADDs). We also develop equivalent ADD algorithms for newly defined matrix operations such as $\textit{eliminate_variables}$ and $\textit{eliminate_redundant_variables},$ which aid in the numerical computation of circuit PTMs. We use PTMs to evaluate circuit reliability and derive polynomial approximations for circuit error probabilities in terms of gate error probabilities. PTMs can also analyze the effects of logic and electrical masking on error mitigation. We show that ignoring logic masking can overestimate errors by an order of magnitude. We incorporate electrical masking by computing error attenuation probabilities, based on analytical models, into an extended PTM framework for reliability computation. We further define a susceptibility measure to identify gates whose errors are not well masked. We show that hardening a few gates can significantly improve circuit reliability. |
| Starting Page | 1 |
| Ending Page | 35 |
| Page Count | 35 |
| File Format | |
| ISSN | 10844309 |
| e-ISSN | 15577309 |
| DOI | 10.1145/1297666.1297674 |
| Volume Number | 13 |
| Issue Number | 1 |
| Journal | ACM Transactions on Design Automation of Electronic Systems (TODAES) |
| Language | English |
| Publisher | Association for Computing Machinery (ACM) |
| Publisher Date | 2008-02-06 |
| Publisher Place | New York |
| Access Restriction | One Nation One Subscription (ONOS) |
| Subject Keyword | Symbolic analysis Fault tolerance |
| Content Type | Text |
| Resource Type | Article |
| Subject | Computer Graphics and Computer-Aided Design Computer Science Applications Electrical and Electronic Engineering |
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