NDLI: A receiver aware H.264/AVC encoder for decoder complexity control in mobile applications

Content Provider	Springer Nature Link
Author	Semsarzadeh, Mehdi Roodaki, Hoda Aminlou, Alireza Hashemi, Mahmoud Reza Shirmohammadi, Shervin
Copyright Year	2016
Abstract	Due to the power limitations of mobile devices, high-quality video decoding is still a main concern, because it quickly drains battery. In this paper, an H.264/AVC receiver aware encoder has been designed that (1) takes into account all of the decoder modules of a receiver, unlike existing RAEs that only consider some of these modules and are therefore sub optimal, and (2) is independent of decoder implementations and platforms. Furthermore, a decoder complexity controller has been proposed that reduces the complexity of different decoder modules, while minimum distortion is achieved. Finally, we formulate and solve a generic RAE optimization problem, and apply this solution to control the computational resource allocation at the macroblock level of a RAE. Our experiments indicate that the proposed approach can reduce the complexity of different modules by up to 10 % with no quality degradation. In addition, the average error of the proposed complexity controller is 0.8 %, making the accuracy of the system very close to 1.
Starting Page	431
Ending Page	438
Page Count	8
File Format	PDF
ISSN	18631703
Journal	Signal, Image and Video Processing
Volume Number	11
Issue Number	3
e-ISSN	18631711
Language	English
Publisher	Springer London
Publisher Date	2016-10-01
Publisher Place	London
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Receiver aware encoding Decoder complexity modeling Complexity control H.264/AVC Signal,Image and Speech Processing Image Processing and Computer Vision Computer Imaging, Vision, Pattern Recognition and Graphics Multimedia Information Systems
Content Type	Text
Resource Type	Article
Subject	Signal Processing Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A real-time H.264/AVC VLSI encoder architecture

Real-time H.264/AVC baseline decoder implementation on TMS320C6416

Gravity direction-based ultra-fast intraprediction algorithm for H.264/AVC video coding

Low-complexity quantization for H.264/AVC

Design a Low-Power H.264/AVC Baseline Decoder at All Abstraction Levels—A Showcase

Scalable row-based parallel H.264 decoder on embedded multicore processors

High-performance adaptive group-of-picture rate control for H.264/AVC

A fast rate-distortion optimization algorithm for H.264/AVC codec

Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder

A receiver aware H.264/AVC encoder for decoder complexity control in mobile applications

Similar Documents

A real-time H.264/AVC VLSI encoder architecture

Real-time H.264/AVC baseline decoder implementation on TMS320C6416

Gravity direction-based ultra-fast intraprediction algorithm for H.264/AVC video coding

Low-complexity quantization for H.264/AVC

Design a Low-Power H.264/AVC Baseline Decoder at All Abstraction Levels—A Showcase

Scalable row-based parallel H.264 decoder on embedded multicore processors

High-performance adaptive group-of-picture rate control for H.264/AVC

A fast rate-distortion optimization algorithm for H.264/AVC codec

Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder

A receiver aware H.264/AVC encoder for decoder complexity control in mobile applications