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  1. Journal of Signal Processing Systems
  2. Journal of Signal Processing Systems : Volume 24
  3. Journal of Signal Processing Systems : Volume 24, Issue 2-3, March 2000
  4. Pipeline Reconfigurable FPGAs
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Journal of Signal Processing Systems : Volume 87
Journal of Signal Processing Systems : Volume 86
Journal of Signal Processing Systems : Volume 85
Journal of Signal Processing Systems : Volume 84
Journal of Signal Processing Systems : Volume 83
Journal of Signal Processing Systems : Volume 82
Journal of Signal Processing Systems : Volume 81
Journal of Signal Processing Systems : Volume 80
Journal of Signal Processing Systems : Volume 79
Journal of Signal Processing Systems : Volume 78
Journal of Signal Processing Systems : Volume 77
Journal of Signal Processing Systems : Volume 76
Journal of Signal Processing Systems : Volume 75
Journal of Signal Processing Systems : Volume 74
Journal of Signal Processing Systems : Volume 73
Journal of Signal Processing Systems : Volume 72
Journal of Signal Processing Systems : Volume 71
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Journal of Signal Processing Systems : Volume 58
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Journal of Signal Processing Systems : Volume 56
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Journal of Signal Processing Systems : Volume 54
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Journal of Signal Processing Systems : Volume 52
Journal of Signal Processing Systems : Volume 51
Journal of Signal Processing Systems : Volume 50
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Journal of Signal Processing Systems : Volume 48
Journal of Signal Processing Systems : Volume 47
Journal of Signal Processing Systems : Volume 46
Journal of Signal Processing Systems : Volume 45
Journal of Signal Processing Systems : Volume 44
Journal of Signal Processing Systems : Volume 43
Journal of Signal Processing Systems : Volume 42
Journal of Signal Processing Systems : Volume 41
Journal of Signal Processing Systems : Volume 40
Journal of Signal Processing Systems : Volume 39
Journal of Signal Processing Systems : Volume 38
Journal of Signal Processing Systems : Volume 37
Journal of Signal Processing Systems : Volume 36
Journal of Signal Processing Systems : Volume 35
Journal of Signal Processing Systems : Volume 34
Journal of Signal Processing Systems : Volume 33
Journal of Signal Processing Systems : Volume 32
Journal of Signal Processing Systems : Volume 31
Journal of Signal Processing Systems : Volume 30
Journal of Signal Processing Systems : Volume 29
Journal of Signal Processing Systems : Volume 28
Journal of Signal Processing Systems : Volume 27
Journal of Signal Processing Systems : Volume 26
Journal of Signal Processing Systems : Volume 25
Journal of Signal Processing Systems : Volume 24
Journal of Signal Processing Systems : Volume 24, Issue 2-3, March 2000
Guest Editors' Introduction ( Journal of Signal Processing Systems , Volume 24 , Issue 2-3 )
Pipeline Reconfigurable FPGAs
Design and Implementation of the MorphoSys Reconfigurable Computing Processor
Co-Synthesis to a Hybrid RISC/FPGA Architecture
Design-Space Exploration for Block-Processing Based Temporal Partitioning of Run-Time Reconfigurable Systems
Application of Reconfigurable CORDIC Architectures
A Configurable Logic Based Architecture for Real-Time Continuous Speech Recognition Using Hidden Markov Models
The CAM-Brain Machine (CBM): Real Time Evolution and Update of a 75 Million Neuron FPGA-Based Artificial Brain
Journal of Signal Processing Systems : Volume 24, Issue 1, February 2000
Journal of Signal Processing Systems : Volume 23
Journal of Signal Processing Systems : Volume 22
Journal of Signal Processing Systems : Volume 21
Journal of Signal Processing Systems : Volume 20
Journal of Signal Processing Systems : Volume 19
Journal of Signal Processing Systems : Volume 18
Journal of Signal Processing Systems : Volume 17
Journal of Signal Processing Systems : Volume 16
Journal of Signal Processing Systems : Volume 15

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Pipeline Reconfigurable FPGAs

Content Provider Springer Nature Link
Author Schmit, Herman H. Cadambi, Srihari Moe, Matthew Goldstein, Seth C.
Copyright Year 2000
Abstract While reconfigurable computing promises to deliver incomparable performance, it is still a marginal technology due to the high cost of developing and upgrading applications. Hardware virtualization can be used to significantly reduce both these costs. In this paper we describe the benefits of hardware virtualization, and show how it can be achieved using the technique of pipeline reconfiguration. The result is PipeRench, an architecture that supports robust compilation and provides forward compatibility. Our preliminary performance analysis on PipeRench predicts that it will outperform commercial FPGAs and DSPs in both overall performance and in performance normalized for silicon area over a broad range of problem sizes.
Starting Page 129
Ending Page 146
Page Count 18
File Format PDF
ISSN 09225773
Journal Journal of Signal Processing Systems
Volume Number 24
Issue Number 2-3
Language English
Publisher Kluwer Academic Publishers
Publisher Date 2000-03-01
Publisher Place Boston
Access Restriction Subscribed
Subject Keyword Signal, Image and Speech Processing Circuits and Systems Electrical Engineering Image Processing and Computer Vision Pattern Recognition Computer Imaging, Vision, Pattern Recognition and Graphics
Content Type Text
Resource Type Article
Subject Signal Processing Information Systems Electrical and Electronic Engineering
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