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| Content Provider | Springer Nature Link |
|---|---|
| Author | Jääskeläinen, Pekka Kultala, Heikki Viitanen, Timo Takala, Jarmo |
| Copyright Year | 2014 |
| Abstract | Exposing details of the processor datapath to the programmer is motivated by improvements in the energy efficiency and the simplification of the microarchitecture. However, an instruction format that can control the data path in a more explicit manner requires more expressiveness when compared to an instruction format that implements more of the control logic in the processor hardware and presents conventional general purpose register based instructions to the programmer. That is, programs for exposed datapath processors might require additional instruction memory bits to be fetched, which consumes additional energy. With the interest in energy and power efficiency rising in the past decade, exposed datapath architectures have received renewed attention. Several variations of the additional details to expose to the programmer have been proposed in the academy, and some exposed datapath features have also appeared in commercial architectures. The different variations of proposed exposed datapath architectures and their effects to the energy efficiency, however, have not so far been analyzed in a systematic manner in public. This article provides a review of exposed datapath approaches and highlights their differences. In addition, a set of interesting exposed datapath design choices is evaluated in a closer study. Due to the fact that memories constitute a major component of power consumption in contemporary processors, we analyze instruction encodings for different exposed datapath variations and consider the energy required to fetch the additional instruction bits in comparison to the register file access savings achieved with the exposed datapath. |
| Starting Page | 49 |
| Ending Page | 64 |
| Page Count | 16 |
| File Format | |
| ISSN | 19398018 |
| Journal | Journal of Signal Processing Systems |
| Volume Number | 80 |
| Issue Number | 1 |
| e-ISSN | 19398115 |
| Language | English |
| Publisher | Springer US |
| Publisher Date | 2014-07-25 |
| Publisher Place | Boston |
| Access Restriction | One Nation One Subscription (ONOS) |
| Subject Keyword | Processor architectures Exposed datapath architectures Software bypassing Low power computing VLIW TTA Signal, Image and Speech Processing Circuits and Systems Electrical Engineering Image Processing and Computer Vision Pattern Recognition Computer Imaging, Vision, Pattern Recognition and Graphics |
| Content Type | Text |
| Resource Type | Article |
| Subject | Theoretical Computer Science Signal Processing Control and Systems Engineering Information Systems Modeling and Simulation Hardware and Architecture |
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