NDLI: Performance debugging of Esterel specifications

Content Provider	Springer Nature Link
Author	Ju, Lei Huynh, Bach Khoa Roychoudhury, Abhik Chakraborty, Samarjit
Copyright Year	2012
Abstract	Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based on the underlying “synchrony hypothesis”, which needs to be validated when Esterel specifications get compiled to real implementations (such as C code). In this work, we present a model-driven and architecture-aware timing analysis framework for C code generated from Esterel and executed on general-purpose processors. By integrating model-level information into the traditional timing analysis, we can efficiently compute accurate time estimates via systematically eliminating a large number of infeasible paths in the generated code. Experimental results show that with our proposed intermediate representation level infeasible path analysis in the model compilation, we obtain up to 16.1 % tighter WCET estimates compared to the traditional assembly code level infeasible path detection with substantially less analysis time. Furthermore, by maintaining the traceability links between Esterel specifications and the generated C code, we are able to map the time-critical computations at the C-level back to the Esterel-level.
Starting Page	570
Ending Page	600
Page Count	31
File Format	PDF
ISSN	09226443
Journal	Real-Time Systems
Volume Number	48
Issue Number	5
e-ISSN	15731383
Language	English
Publisher	Springer US
Publisher Date	2012-05-24
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Esterel Synchronous programming Performance debugging WCET analysis Special Purpose and Application-Based Systems Computer Systems Organization and Communication Networks Communications Engineering, Networks Control, Robotics, Mechatronics Performance and Reliability
Content Type	Text
Resource Type	Article
Subject	Control and Optimization Computer Networks and Communications Control and Systems Engineering Electrical and Electronic Engineering Computer Science Applications Modeling and Simulation

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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Implementing mixed-criticality synchronous reactive programs upon uniprocessor platforms

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Preface to special issue on adaptive embedded systems

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Performance debugging of Esterel specifications

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