NDLI: Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures

Content Provider	Springer Nature Link
Author	Sudarsanam, Ashok Liao, Stan Devadas, Srinivas
Copyright Year	1999
Abstract	We address the problem of code generation for DSP systems on a chip. In such systems, the amount of silicon devoted to program ROM is limited, so in addition to meeting various high-performance constraints, the application software must be sufficiently dense. Unfortunately, existing compiler technology is unable to generate high-quality code for DSPs since it does not provide adequate support for the specialized architectural features of DSPs. Thus, designers often resort to programming application software in assembly, which is a very tedious and time-consuming task. In this paper, we focus on providing compiler support for a group of specialized architectural features that exist in many DSPs, namely indirect addressing modes with auto-increment/decrement arithmetic. In these DSPs, an indexed addressing mode is generally not available, so automatic variables must be accessed by allocating address registers and performing address arithmetic. Subsuming address arithmetic into auto-increment /decrement arithmetic improves both the performance and size of the generated code. Our objective is to provide a method for comprehensively analyzing the performance benefits and hardware cost due to an auto-increment /decrement feature that varies from-l to +l, and allowing access to k address registers in an address generator. We provide this method via a parameterizable optimization algorithm that operates on a procedure-wise basis. Thus, the optimization techniques in a compiler can be used not only to generate efficient or compact code, but also to help the designer of a custom DSP architecture make decisions on address arithmetic features.
Starting Page	5
Ending Page	22
Page Count	18
File Format	PDF
ISSN	09295585
Journal	Design Automation for Embedded Systems
Volume Number	4
Issue Number	1
e-ISSN	15728080
Language	English
Publisher	Kluwer Academic Publishers
Publisher Date	1999-01-01
Publisher Place	Boston
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	Special Purpose and Application-Based Systems Computer-Aided Engineering (CAD, CAE) and Design Electronic and Computer Engineering Circuits and Systems
Content Type	Text
Resource Type	Article
Subject	Software Hardware and Architecture

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Editors’ introduction

Rapid Prototyping of Embedded Hardware/Software Systems

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Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures

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