WebSite Logo
  • Content
  • Similar Resources
  • Metadata
  • Cite This
  • Log-in
  • Fullscreen
Log-in
Do not have an account? Register Now
Forgot your password? Account recovery
  1. Analog Integrated Circuits and Signal Processing
  2. Analog Integrated Circuits and Signal Processing : Volume 25
  3. Analog Integrated Circuits and Signal Processing : Volume 25, Issue 3, December 2000
  4. A CMOS Offset Phase Locked Loop for a GSM Transmitter
Loading...

Please wait, while we are loading the content...

Analog Integrated Circuits and Signal Processing : Volume 92
Analog Integrated Circuits and Signal Processing : Volume 91
Analog Integrated Circuits and Signal Processing : Volume 90
Analog Integrated Circuits and Signal Processing : Volume 89
Analog Integrated Circuits and Signal Processing : Volume 88
Analog Integrated Circuits and Signal Processing : Volume 87
Analog Integrated Circuits and Signal Processing : Volume 86
Analog Integrated Circuits and Signal Processing : Volume 85
Analog Integrated Circuits and Signal Processing : Volume 84
Analog Integrated Circuits and Signal Processing : Volume 83
Analog Integrated Circuits and Signal Processing : Volume 82
Analog Integrated Circuits and Signal Processing : Volume 81
Analog Integrated Circuits and Signal Processing : Volume 80
Analog Integrated Circuits and Signal Processing : Volume 79
Analog Integrated Circuits and Signal Processing : Volume 78
Analog Integrated Circuits and Signal Processing : Volume 77
Analog Integrated Circuits and Signal Processing : Volume 76
Analog Integrated Circuits and Signal Processing : Volume 75
Analog Integrated Circuits and Signal Processing : Volume 74
Analog Integrated Circuits and Signal Processing : Volume 73
Analog Integrated Circuits and Signal Processing : Volume 72
Analog Integrated Circuits and Signal Processing : Volume 71
Analog Integrated Circuits and Signal Processing : Volume 70
Analog Integrated Circuits and Signal Processing : Volume 69
Analog Integrated Circuits and Signal Processing : Volume 68
Analog Integrated Circuits and Signal Processing : Volume 67
Analog Integrated Circuits and Signal Processing : Volume 66
Analog Integrated Circuits and Signal Processing : Volume 65
Analog Integrated Circuits and Signal Processing : Volume 64
Analog Integrated Circuits and Signal Processing : Volume 63
Analog Integrated Circuits and Signal Processing : Volume 62
Analog Integrated Circuits and Signal Processing : Volume 61
Analog Integrated Circuits and Signal Processing : Volume 60
Analog Integrated Circuits and Signal Processing : Volume 59
Analog Integrated Circuits and Signal Processing : Volume 58
Analog Integrated Circuits and Signal Processing : Volume 57
Analog Integrated Circuits and Signal Processing : Volume 56
Analog Integrated Circuits and Signal Processing : Volume 55
Analog Integrated Circuits and Signal Processing : Volume 54
Analog Integrated Circuits and Signal Processing : Volume 53
Analog Integrated Circuits and Signal Processing : Volume 52
Analog Integrated Circuits and Signal Processing : Volume 51
Analog Integrated Circuits and Signal Processing : Volume 50
Analog Integrated Circuits and Signal Processing : Volume 49
Analog Integrated Circuits and Signal Processing : Volume 48
Analog Integrated Circuits and Signal Processing : Volume 47
Analog Integrated Circuits and Signal Processing : Volume 46
Analog Integrated Circuits and Signal Processing : Volume 45
Analog Integrated Circuits and Signal Processing : Volume 44
Analog Integrated Circuits and Signal Processing : Volume 43
Analog Integrated Circuits and Signal Processing : Volume 42
Analog Integrated Circuits and Signal Processing : Volume 41
Analog Integrated Circuits and Signal Processing : Volume 40
Analog Integrated Circuits and Signal Processing : Volume 39
Analog Integrated Circuits and Signal Processing : Volume 38
Analog Integrated Circuits and Signal Processing : Volume 37
Analog Integrated Circuits and Signal Processing : Volume 36
Analog Integrated Circuits and Signal Processing : Volume 35
Analog Integrated Circuits and Signal Processing : Volume 34
Analog Integrated Circuits and Signal Processing : Volume 33
Analog Integrated Circuits and Signal Processing : Volume 32
Analog Integrated Circuits and Signal Processing : Volume 31
Analog Integrated Circuits and Signal Processing : Volume 30
Analog Integrated Circuits and Signal Processing : Volume 29
Analog Integrated Circuits and Signal Processing : Volume 28
Analog Integrated Circuits and Signal Processing : Volume 27
Analog Integrated Circuits and Signal Processing : Volume 26
Analog Integrated Circuits and Signal Processing : Volume 25
Analog Integrated Circuits and Signal Processing : Volume 25, Issue 3, December 2000
Foreword Special Issue on Analog Circuit Techniques and Related Topics
Design of Fully Balanced Analog Systems Based on Ordinary and/or Modified Single-Ended Opamps
Substrate Noise Simulation Techniques for Analog-Digital Mixed LSI Design
A 10 bit Current-Mode CMOS A/D Converter with a Current Predictor and a Modular Current Reference
A 1.5 V, 8 mW, 8 b, 15 Msps BiCMOS A/D Converter
Low-Power Area-Efficient Pipelined A/D Converter Design Using a Single-Ended Amplifier
Differential Analog Data Path DC Offset Calibration Methods
A CMOS Offset Phase Locked Loop for a GSM Transmitter
A 1.9-GHz Direct Conversion Transmitter IC with Low Power On-Chip Frequency Doubler
GaAs FET Current-Mode Integrators and Their Application to Filters
A CMOS Analog Multiplier Free from Mobility Reduction and Body Effect
Multi-Input Floating Gate Differential Amplifier and Application to Intelligent Sensors
A Fast and Accurate Method of Redesigning Analog Subcircuits for Technology Scaling
Layout Dependent Matching Analysis of CMOS Circuits
An Analog-Digital Merged Neural Circuit Using Pulse Width Modulation Technique
Integrated Circuits of Map Chaos Generators
A Content-Addressable Memory Using “Switched Diffusion Analog Memory with Feedback Circuit”
Low Voltage High-Speed CMOS Square-Law Composite Transistor Cell
Analog Integrated Circuits and Signal Processing : Volume 25, Issue 2, November 2000
Analog Integrated Circuits and Signal Processing : Volume 25, Issue 1, October 2000
Analog Integrated Circuits and Signal Processing : Volume 24
Analog Integrated Circuits and Signal Processing : Volume 23
Analog Integrated Circuits and Signal Processing : Volume 22
Analog Integrated Circuits and Signal Processing : Volume 21
Analog Integrated Circuits and Signal Processing : Volume 20
Analog Integrated Circuits and Signal Processing : Volume 19
Analog Integrated Circuits and Signal Processing : Volume 18
Analog Integrated Circuits and Signal Processing : Volume 17
Analog Integrated Circuits and Signal Processing : Volume 16
Analog Integrated Circuits and Signal Processing : Volume 15
Analog Integrated Circuits and Signal Processing : Volume 14
Analog Integrated Circuits and Signal Processing : Volume 13
Analog Integrated Circuits and Signal Processing : Volume 12

Similar Documents

...
A low-power phase-locked loop for UWB applications

Article

...
A 5 GHz 90-nm CMOS all digital phase-locked loop

Article

...
A Novel Calibration Method for Phase-Locked Loops

Article

...
A fast-lock delay-locked loop architecture with improved precharged PFD

Article

...
A High Speed, Low Voltage CMOS Offset Comparator

Article

...
A single capacitor loop filter phase-locked loop with frequency voltage converter

Article

...
A Fully Integrated CMOS Phase-Locked Loop with 30 MHz to 2 GHz Locking Range and ±35 ps Jitter

Article

...
A Novel Calibration Method for Phase-Locked Loops

Article

...
A low power CMOS phase-switching prescaler for 1.8–2.4 GHz wireless communications

Article

A CMOS Offset Phase Locked Loop for a GSM Transmitter

Content Provider Springer Nature Link
Author Yamawaki, Taizo Kokubo, Masaru Hagisawa, Hiroshi
Copyright Year 2000
Abstract This paper describes a CMOS offset phase locked loop (OPLL) for a global system for mobile communications (GSM) transmitter. The OPLL is a PLL with a down-conversion mixer in the feedback path and is used in the transmit (Tx) path as a frequency converter. It has a tracking bandpass filter characteristic in such a way that the OPLL can suppress the noise in the GSM receiving band (Tx noise) without a duplexer. When the loop bandwidth of the OPLL was 1.0 MHz, the Tx noise level of −163.5 dBc/Hz, the phase error of 0.66° rms, and the settling time of 40 μs were achieved. The IC was implemented by using 0.35-μm CMOS process. It takes 860 μm×620 μm of total chip area and consumes 17.6 mA with a 3.0 V power supply.
Starting Page 253
Ending Page 259
Page Count 7
File Format PDF
ISSN 09251030
Journal Analog Integrated Circuits and Signal Processing
Volume Number 25
Issue Number 3
e-ISSN 15731979
Language English
Publisher Kluwer Academic Publishers
Publisher Date 2000-01-01
Publisher Place Boston
Access Restriction One Nation One Subscription (ONOS)
Subject Keyword Electronic and Computer Engineering Signal, Image and Speech Processing Circuits and Systems
Content Type Text
Resource Type Article
Subject Surfaces, Coatings and Films Signal Processing Hardware and Architecture
  • About
  • Disclaimer
  • Feedback
  • Sponsor
  • Contact
  • Chat with Us
About National Digital Library of India (NDLI)
NDLI logo

National Digital Library of India (NDLI) is a virtual repository of learning resources which is not just a repository with search/browse facilities but provides a host of services for the learner community. It is sponsored and mentored by Ministry of Education, Government of India, through its National Mission on Education through Information and Communication Technology (NMEICT). Filtered and federated searching is employed to facilitate focused searching so that learners can find the right resource with least effort and in minimum time. NDLI provides user group-specific services such as Examination Preparatory for School and College students and job aspirants. Services for Researchers and general learners are also provided. NDLI is designed to hold content of any language and provides interface support for 10 most widely used Indian languages. It is built to provide support for all academic levels including researchers and life-long learners, all disciplines, all popular forms of access devices and differently-abled learners. It is designed to enable people to learn and prepare from best practices from all over the world and to facilitate researchers to perform inter-linked exploration from multiple sources. It is developed, operated and maintained from Indian Institute of Technology Kharagpur.

Learn more about this project from here.

Disclaimer

NDLI is a conglomeration of freely available or institutionally contributed or donated or publisher managed contents. Almost all these contents are hosted and accessed from respective sources. The responsibility for authenticity, relevance, completeness, accuracy, reliability and suitability of these contents rests with the respective organization and NDLI has no responsibility or liability for these. Every effort is made to keep the NDLI portal up and running smoothly unless there are some unavoidable technical issues.

Feedback

Sponsor

Ministry of Education, through its National Mission on Education through Information and Communication Technology (NMEICT), has sponsored and funded the National Digital Library of India (NDLI) project.

Contact National Digital Library of India
Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302
See location in the Map
03222 282435
Mail: support@ndl.gov.in
Sl. Authority Responsibilities Communication Details
1 Ministry of Education (GoI),
Department of Higher Education
Sanctioning Authority https://www.education.gov.in/ict-initiatives
2 Indian Institute of Technology Kharagpur Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project https://www.iitkgp.ac.in
3 National Digital Library of India Office, Indian Institute of Technology Kharagpur The administrative and infrastructural headquarters of the project Dr. B. Sutradhar  bsutra@ndl.gov.in
4 Project PI / Joint PI Principal Investigator and Joint Principal Investigators of the project Dr. B. Sutradhar  bsutra@ndl.gov.in
Prof. Saswat Chakrabarti  will be added soon
5 Website/Portal (Helpdesk) Queries regarding NDLI and its services support@ndl.gov.in
6 Contents and Copyright Issues Queries related to content curation and copyright issues content@ndl.gov.in
7 National Digital Library of India Club (NDLI Club) Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach clubsupport@ndl.gov.in
8 Digital Preservation Centre (DPC) Assistance with digitizing and archiving copyright-free printed books dpc@ndl.gov.in
9 IDR Setup or Support Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops idr@ndl.gov.in
I will try my best to help you...
Cite this Content
Loading...