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| Content Provider | Springer Nature Link |
|---|---|
| Author | OKADA, Kenichi ONODERA, Hidetoshi TAMARU, Keikichi |
| Copyright Year | 2000 |
| Abstract | Layout has strong influence on matching properties of a circuit. Current matching models, which characterize both local random non-uniformities and global systematic non-uniformities stochastically, are not adequate for the matching analysis taking the effect of layout realization into account. In order to consider topological information of layout into matching analysis, we propose a matching model which treats the random and systematic components separately. Also, we characterize the micro-loading effect, which modulates fabricated line-width according to the local density of layout patterns, into matching analysis. With these two techniques, we can perform matching analysis of CMOS circuits taking layout information into account. |
| Starting Page | 309 |
| Ending Page | 318 |
| Page Count | 10 |
| File Format | |
| ISSN | 09251030 |
| Journal | Analog Integrated Circuits and Signal Processing |
| Volume Number | 25 |
| Issue Number | 3 |
| e-ISSN | 15731979 |
| Language | English |
| Publisher | Kluwer Academic Publishers |
| Publisher Date | 2000-01-01 |
| Publisher Place | Boston |
| Access Restriction | One Nation One Subscription (ONOS) |
| Subject Keyword | Electronic and Computer Engineering Signal, Image and Speech Processing Circuits and Systems |
| Content Type | Text |
| Resource Type | Article |
| Subject | Surfaces, Coatings and Films Signal Processing Hardware and Architecture |
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