NDLI: An adaptive voltage scaling DC–DC converter based on embedded pulse skip modulation

Content Provider	Springer Nature Link
Author	Wang, Dongjun Luo, Ping Zhen, Shaowei He, Yajuan
Copyright Year	2015
Abstract	An adaptive voltage scaling (AVS) DC–DC converter based on embedded pulse skip modulation (PSM) is presented in this paper. As AVS technique developing, the supply voltage of digital circuits can be scaled adaptively with the changing of operation frequency and working environment. The critical path replica (CPR) is widely used in AVS implementation. The worst-case margin is relaxed by probing and tracking the CPR delay time of target applications. Consequently, the energy consumption of digital circuits is decreased significantly with supply voltage reduced. At the same time, in order to improve the efficiency of DC–DC converter especially in light load, the PSM mode has been used in proposed circuit structure. The circuit of AVS DC–DC converter based on embedded PSM has been implemented and fabricated in a standard 0.13 μm CMOS process which occupies 1.2 mm2 active silicon areas. The experimental results show that, the output voltage of the DC–DC converter is well regulated from 0.6 to 1.5 V when the clock frequency varies within the range of 30–150 MHz. The maximum energy saving of 83 % is obtained with the proposed circuit structure compared to the traditional fixed voltage.
Starting Page	445
Ending Page	453
Page Count	9
File Format	PDF
ISSN	09251030
Journal	Analog Integrated Circuits and Signal Processing
Volume Number	84
Issue Number	3
e-ISSN	15731979
Language	English
Publisher	Springer US
Publisher Date	2015-07-10
Publisher Place	New York
Access Restriction	One Nation One Subscription (ONOS)
Subject Keyword	DC–DC converter AVS PSM CPR Digital circuit Adaptive duty ratio Circuits and Systems Electrical Engineering Signal, Image and Speech Processing
Content Type	Text
Resource Type	Article
Subject	Surfaces, Coatings and Films Signal Processing Hardware and Architecture

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